{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2022,12,23]],"date-time":"2022-12-23T03:49:08Z","timestamp":1671767348801},"reference-count":44,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"2","license":[{"start":{"date-parts":[[2015,6,1]],"date-time":"2015-06-01T00:00:00Z","timestamp":1433116800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE J. Emerg. Sel. Topics Circuits Syst."],"published-print":{"date-parts":[[2015,6]]},"DOI":"10.1109\/jetcas.2015.2426497","type":"journal-article","created":{"date-parts":[[2015,5,7]],"date-time":"2015-05-07T18:46:44Z","timestamp":1431024404000},"page":"162-172","source":"Crossref","is-referenced-by-count":6,"title":["Device Requirements and Technology-Driven Architecture Optimization for Analog Neurocomputing"],"prefix":"10.1109","volume":"5","author":[{"given":"Vehbi","family":"Calayir","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Larry","family":"Pileggi","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref39","doi-asserted-by":"publisher","DOI":"10.1109\/LED.2012.2188491"},{"key":"ref38","doi-asserted-by":"publisher","DOI":"10.1109\/ULTSYM.2011.0461"},{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1109\/NEWCAS.2013.6573563"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1063\/1.2976435"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1038\/nmat2804"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1109\/TMAG.2013.2242446"},{"key":"ref37","doi-asserted-by":"publisher","DOI":"10.1109\/IJCNN.2013.6707002"},{"key":"ref36","doi-asserted-by":"publisher","DOI":"10.1109\/FCS.2012.6243641"},{"key":"ref35","doi-asserted-by":"publisher","DOI":"10.1109\/ULTSYM.2012.0264"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM.2011.6131589"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1088\/0957-4484\/21\/17\/175202"},{"key":"ref40","doi-asserted-by":"publisher","DOI":"10.1109\/ULTSYM.2000.922679"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/TNNLS.2012.2204770"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2011.2161360"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/IJCNN.2012.6252609"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/TNANO.2012.2202125"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1016\/j.jmmm.2007.12.021"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/TMAG.2013.2239272"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1038\/ncomms1024"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/CNNA.2012.6331473"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/CNNA.2012.6331463"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM.2014.7047159"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1162\/NECO_a_00377"},{"key":"ref27","article-title":"MLogic: All spin logic device and circuits for future electronics","author":"zhu","year":"2014","journal-title":"IEEE Int Magn Conf"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/72.846744"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1023\/A:1008278225960"},{"key":"ref29","first-page":"230","article-title":"Low-current perpendicular domain wall motion cell for scalable high-speed MRAM","author":"fukami","year":"2009","journal-title":"Proc Symp VLSI Technol"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/4.364437"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1021\/nl201040y"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2011.2147791"},{"key":"ref2","first-page":"1","article-title":"A 45nm CMOS neuromorphic chip with a scalable architecture for learning in networks of spiking neurons","author":"seo","year":"2011","journal-title":"Proc IEEE Custom Integrated Circuits Conf"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.3389\/fnins.2011.00108"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2012.2217146"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1038\/nature04035"},{"key":"ref22","first-page":"1","article-title":"Magnetic cellular neural network with spin wave bus","author":"khitun","year":"2010","journal-title":"Proc Int Workshop Cell Nanoscale Netw Their Appl"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/TMAG.2006.879722"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.3389\/fnins.2012.00090"},{"key":"ref42","doi-asserted-by":"publisher","DOI":"10.1016\/j.neucom.2008.06.029"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.2478\/v10187-010-0031-6"},{"key":"ref41","doi-asserted-by":"publisher","DOI":"10.1109\/31.7601"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1145\/2228360.2228446"},{"key":"ref44","first-page":"233","article-title":"10?25 nm piezoelectric nano-actuators and NEMS switches for millivolt computational logic","author":"zaghloul","year":"2013","journal-title":"Proc IEEE Int Conf Micro Electro Mech Syst"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/TMAG.2012.2197186"},{"key":"ref43","doi-asserted-by":"publisher","DOI":"10.1063\/1.3194148"}],"container-title":["IEEE Journal on Emerging and Selected Topics in Circuits and Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/5503868\/7120202\/07103366.pdf?arnumber=7103366","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,12]],"date-time":"2022-01-12T16:01:47Z","timestamp":1642003307000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7103366\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2015,6]]},"references-count":44,"journal-issue":{"issue":"2"},"URL":"https:\/\/doi.org\/10.1109\/jetcas.2015.2426497","relation":{},"ISSN":["2156-3357","2156-3365"],"issn-type":[{"value":"2156-3357","type":"print"},{"value":"2156-3365","type":"electronic"}],"subject":[],"published":{"date-parts":[[2015,6]]}}}