{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,4,24]],"date-time":"2026-04-24T14:57:47Z","timestamp":1777042667271,"version":"3.51.4"},"reference-count":36,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"1","license":[{"start":{"date-parts":[[2018,3,1]],"date-time":"2018-03-01T00:00:00Z","timestamp":1519862400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2018,3,1]],"date-time":"2018-03-01T00:00:00Z","timestamp":1519862400000},"content-version":"am","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2018,3,1]],"date-time":"2018-03-01T00:00:00Z","timestamp":1519862400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2018,3,1]],"date-time":"2018-03-01T00:00:00Z","timestamp":1519862400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/100006234","name":"Sandia National Laboratories Hardware Acceleration of Adaptive Neural Algorithms Grand Challenge Laboratory Directed Research and Development (LDRD) Project","doi-asserted-by":"publisher","id":[{"id":"10.13039\/100006234","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/100006234","name":"Sandia National Laboratories is a multimission laboratory","doi-asserted-by":"publisher","id":[{"id":"10.13039\/100006234","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/100000015","name":"National Technology and Engineering Solutions of Sandia, LLC., a wholly owned subsidiary of Honeywell International, Inc., for the U.S. Department of Energy\u2019s National Nuclear Security Administration","doi-asserted-by":"publisher","award":["DE-NA0003525"],"award-info":[{"award-number":["DE-NA0003525"]}],"id":[{"id":"10.13039\/100000015","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE J. Emerg. Sel. Topics Circuits Syst."],"published-print":{"date-parts":[[2018,3]]},"DOI":"10.1109\/jetcas.2018.2796379","type":"journal-article","created":{"date-parts":[[2018,1,23]],"date-time":"2018-01-23T19:17:37Z","timestamp":1516735057000},"page":"86-101","source":"Crossref","is-referenced-by-count":157,"title":["Multiscale Co-Design Analysis of Energy, Latency, Area, and Accuracy of a ReRAM Analog Neural Training Accelerator"],"prefix":"10.1109","volume":"8","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-6537-1836","authenticated-orcid":false,"given":"Matthew J.","family":"Marinella","sequence":"first","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0002-3676-6986","authenticated-orcid":false,"given":"Sapan","family":"Agarwal","sequence":"additional","affiliation":[]},{"given":"Alexander","family":"Hsia","sequence":"additional","affiliation":[]},{"given":"Isaac","family":"Richter","sequence":"additional","affiliation":[]},{"given":"Robin","family":"Jacobs-Gedrim","sequence":"additional","affiliation":[]},{"given":"John","family":"Niroula","sequence":"additional","affiliation":[]},{"given":"Steven J.","family":"Plimpton","sequence":"additional","affiliation":[]},{"given":"Engin","family":"Ipek","sequence":"additional","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0003-3294-4244","authenticated-orcid":false,"given":"Conrad D.","family":"James","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1145\/2897937.2898010"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1109\/IRPS.2013.6532101"},{"key":"ref31","first-page":"1","article-title":"Design implications of memristor-based RRAM cross-point structures","author":"xu","year":"2011","journal-title":"Proc Design Autom Test Eur"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1109\/IMW.2017.7939075"},{"key":"ref36","doi-asserted-by":"publisher","DOI":"10.23919\/VLSIT.2017.7998164"},{"key":"ref35","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM.2014.7047135"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2015.7372570"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1145\/3007787.3001140"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1145\/2744769.2744900"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/ICRC.2016.7738690"},{"key":"ref13","article-title":"A multiply-add engine with monolithically integrated 3D memristor crossbar\/CMOS hybrid circuit","volume":"7","author":"chakrabarti","year":"2017","journal-title":"Sci Rep"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1147\/rd.524.0449"},{"key":"ref15","year":"2015","journal-title":"The International Technology Roadmap for Semiconductors (ITRS)"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1002\/adma.201604310"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1149\/05805.0059ecst"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1116\/1.4828701"},{"key":"ref19","doi-asserted-by":"crossref","first-page":"625","DOI":"10.1038\/nmat3070","article-title":"A fast, high-endurance and scalable non-volatile memory device made from asymmetric Ta2O5–x\/TaO2–x bilayer structures","volume":"10","author":"lee","year":"2011","journal-title":"Nature Mater"},{"key":"ref28","first-page":"854","article-title":"Technology-design co-optimization of resistive cross-point array for accelerating learning algorithms on chip","author":"chen","year":"2015","journal-title":"Proc Design Autom Test Eur Conf Exhib"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1145\/2408776.2408797"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2015.2439635"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.3389\/fnins.2013.00118"},{"key":"ref6","author":"lecun","year":"2018","journal-title":"The MNIST database"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/JEDS.2015.2442242"},{"key":"ref5","author":"agarwal","year":"2017","journal-title":"CrossSim"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2014.58"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1145\/3079856.3080246"},{"key":"ref2","doi-asserted-by":"crossref","first-page":"436","DOI":"10.1038\/nature14539","article-title":"Deep learning","volume":"521","author":"lecun","year":"2015","journal-title":"Nature"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1145\/3007787.3001139"},{"key":"ref1","first-page":"1097","article-title":"ImageNet classification with deep convolutional neural networks","author":"krizhevsky","year":"2012","journal-title":"Proc Adv Neural Inf Process Syst"},{"key":"ref20","first-page":"20.8.1","article-title":"A non-linear ReRAM cell with sub-\n$1~\\mu \\text{A}$\n ultralow operating current for high density vertical resistive memory (VRRAM)","author":"park","year":"2012","journal-title":"IEDM Tech Dig"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/IJCNN.2016.7727298"},{"key":"ref21","first-page":"31.6.1","article-title":"$10\\times 10$\n nm2 Hf\/HfOx crossbar resistive RAM with excellent performance, reliability and low-energy operation","author":"govoreanu","year":"2011","journal-title":"IEDM Tech Dig"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/IMW.2011.5873227"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.5573\/JSTS.2014.14.3.356"},{"key":"ref26","article-title":"Breakdown-free negative level shifter","author":"ho","year":"2002"},{"key":"ref25","article-title":"Voltage level shifting circuit","author":"dame","year":"1974"}],"container-title":["IEEE Journal on Emerging and Selected Topics in Circuits and Systems"],"original-title":[],"link":[{"URL":"http:\/\/ieeexplore.ieee.org\/ielaam\/5503868\/8330765\/8267068-aam.pdf","content-type":"application\/pdf","content-version":"am","intended-application":"syndication"},{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/5503868\/8330765\/08267068.pdf?arnumber=8267068","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,4,8]],"date-time":"2022-04-08T18:52:50Z","timestamp":1649443970000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/8267068\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2018,3]]},"references-count":36,"journal-issue":{"issue":"1"},"URL":"https:\/\/doi.org\/10.1109\/jetcas.2018.2796379","relation":{},"ISSN":["2156-3357","2156-3365"],"issn-type":[{"value":"2156-3357","type":"print"},{"value":"2156-3365","type":"electronic"}],"subject":[],"published":{"date-parts":[[2018,3]]}}}