{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,10,28]],"date-time":"2025-10-28T10:49:22Z","timestamp":1761648562729,"version":"3.37.3"},"reference-count":31,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"4","license":[{"start":{"date-parts":[[2018,12,1]],"date-time":"2018-12-01T00:00:00Z","timestamp":1543622400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/OAPA.html"}],"funder":[{"DOI":"10.13039\/501100001711","name":"Schweizerischer Nationalfonds zur F\u00f6rderung der Wissenschaftlichen Forschung","doi-asserted-by":"publisher","id":[{"id":"10.13039\/501100001711","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/501100001665","name":"Agence Nationale de la Recherche","doi-asserted-by":"publisher","id":[{"id":"10.13039\/501100001665","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE J. Emerg. Sel. Topics Circuits Syst."],"published-print":{"date-parts":[[2018,12]]},"DOI":"10.1109\/jetcas.2018.2851749","type":"journal-article","created":{"date-parts":[[2018,6,29]],"date-time":"2018-06-29T18:41:31Z","timestamp":1530297691000},"page":"746-757","source":"Crossref","is-referenced-by-count":21,"title":["Design of Approximate Circuits by Fabrication of False Timing Paths: The Carry Cut-Back Adder"],"prefix":"10.1109","volume":"8","author":[{"ORCID":"https:\/\/orcid.org\/0000-0003-4779-7742","authenticated-orcid":false,"given":"Vincent","family":"Camus","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-6038-7302","authenticated-orcid":false,"given":"Mattia","family":"Cacciotti","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-1483-3591","authenticated-orcid":false,"given":"Jeremy","family":"Schlachter","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-9968-5278","authenticated-orcid":false,"given":"Christian","family":"Enz","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1109\/ESSCIRC.2016.7598342"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1109\/NGCAS.2017.40"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1145\/360128.360166"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2011.5763154"},{"key":"ref12","first-page":"69","article-title":"An enhanced low-power high-speed adder for error-tolerant application","author":"zhu","year":"2009","journal-title":"Proc 12th IEEE Int Symp Integr Circuits (ISIC)"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2013.6572519"},{"key":"ref14","first-page":"1449","article-title":"A new approximate adder with low relative error and correct sign calculation","author":"hu","year":"2015","journal-title":"Proc IEEE Design Autom Test Eur Conf (DATE)"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2015.7168566"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1145\/1403375.1403679"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1145\/2228360.2228509"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2009.2027626"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2015.7168598"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/NEWCAS.2015.7182028"},{"key":"ref4","first-page":"127:1","article-title":"A low-power carry cut-back approximate adder with fixed-point implementation and floating-point precision","author":"camus","year":"2016","journal-title":"Proc 53rd ACM\/EDAC\/IEEE Design Autom Conf (DAC)"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/ISVLSI.2016.85"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1145\/1594233.1594282"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1145\/74382.74476"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2017.2672976"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1145\/74382.74475"},{"article-title":"Method and system for false path analysis","year":"2007","author":"siarkowski","key":"ref8"},{"article-title":"Design analysis tool for path extraction and false path identification and method thereof","year":"2002","author":"magdy","key":"ref7"},{"key":"ref2","first-page":"488","article-title":"DVAFS: Trading computational accuracy for energy through dynamic-voltage-accuracy-frequency-scaling","author":"moons","year":"2017","journal-title":"Proc Conf Design Autom Test Eur (DATE)"},{"article-title":"Method for modeling and verifying timing exceptions","year":"2008","author":"solaiman","key":"ref9"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1145\/2228360.2228523"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1145\/2228360.2228504"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2017.8203807"},{"key":"ref21","first-page":"258","article-title":"EvoApproxSb: Library of approximate adders and multipliers for circuit design and benchmarking of approximation methods","author":"mrazek","year":"2017","journal-title":"Proc Conf Design Autom Test Eur (DATE)"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1145\/2429384.2429542"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2014.2317180"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.23919\/EUSIPCO.2018.8553451"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1145\/3094124"}],"container-title":["IEEE Journal on Emerging and Selected Topics in Circuits and Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/5503868\/8571018\/08400590.pdf?arnumber=8400590","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,27]],"date-time":"2022-01-27T13:28:48Z","timestamp":1643290128000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/8400590\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2018,12]]},"references-count":31,"journal-issue":{"issue":"4"},"URL":"https:\/\/doi.org\/10.1109\/jetcas.2018.2851749","relation":{},"ISSN":["2156-3357","2156-3365"],"issn-type":[{"type":"print","value":"2156-3357"},{"type":"electronic","value":"2156-3365"}],"subject":[],"published":{"date-parts":[[2018,12]]}}}