{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,2,13]],"date-time":"2026-02-13T20:41:38Z","timestamp":1771015298012,"version":"3.50.1"},"reference-count":41,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"4","license":[{"start":{"date-parts":[[2018,12,1]],"date-time":"2018-12-01T00:00:00Z","timestamp":1543622400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE J. Emerg. Sel. Topics Circuits Syst."],"published-print":{"date-parts":[[2018,12]]},"DOI":"10.1109\/jetcas.2018.2852701","type":"journal-article","created":{"date-parts":[[2018,7,3]],"date-time":"2018-07-03T19:05:16Z","timestamp":1530644716000},"page":"758-769","source":"Crossref","is-referenced-by-count":24,"title":["A Hybrid Approximate Computing Approach for Associative In-Memory Processors"],"prefix":"10.1109","volume":"8","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-0096-0365","authenticated-orcid":false,"given":"Hasan Erdem","family":"Yantir","sequence":"first","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0003-1849-083X","authenticated-orcid":false,"given":"Ahmed M.","family":"Eltawil","sequence":"additional","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0002-6982-365X","authenticated-orcid":false,"given":"Fadi J.","family":"Kurdahi","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref39","doi-asserted-by":"publisher","DOI":"10.1145\/2025113.2025133"},{"key":"ref38","doi-asserted-by":"publisher","DOI":"10.1109\/DSN.2012.6263951"},{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1002\/adma.201103379"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1145\/2228360.2228414"},{"key":"ref31","year":"2012","journal-title":"Predictive Technology Model"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1109\/MDAT.2016.2630270"},{"key":"ref37","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2013.71"},{"key":"ref36","first-page":"49","article-title":"Process variations-aware resistive associative processor design","author":"yant?r","year":"2016","journal-title":"Proc IEEE 34th Int Conf Comput Design (ICCD)"},{"key":"ref35","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2007.373420"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2013.2252057"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1145\/3126526"},{"key":"ref40","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2012.48"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/LCA.2014.2374597"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2013.2292055"},{"key":"ref13","year":"2016","journal-title":"4m (512 k 8) Bit SPI Memory Reram Datasheet"},{"key":"ref14","year":"2016","journal-title":"1T1R Product Picoe—Embedded Resistive Ram"},{"key":"ref15","article-title":"Voltage divider effect for the improvement of variability and endurance of TaOx memristor","volume":"6","author":"kim","year":"2016","journal-title":"Sci Rep"},{"key":"ref16","article-title":"A \n$3\\times 3$\n isotropic gradient operator for image processing","author":"sobel","year":"0"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/DDECS.2013.6549776"},{"key":"ref18","first-page":"812","article-title":"Axilog: Language support for approximate hardware design","author":"yazdanbakhsh","year":"2015","journal-title":"Proc DATE"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2011.5763154"},{"key":"ref28","first-page":"290c","article-title":"Shortstop: An on-chip fast supply boosting technique","author":"pinckney","year":"2013","journal-title":"Proc Symp VLSI Circuits"},{"key":"ref4","first-page":"494","article-title":"A 65 nm 1 Mb nonvolatile computing-in-memory ReRAM macro with sub-16ns multiply-and-accumulate for binary DNN AI edge processors","author":"chen","year":"2018","journal-title":"IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2017.8203788"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/IPDPS.2013.121"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1016\/0743-7315(89)90043-9"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/TMSCS.2017.2665462"},{"key":"ref5","author":"foster","year":"1976","journal-title":"Content Addressable Parallel Processors"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1145\/2893356"},{"key":"ref7","author":"potter","year":"1991","journal-title":"Associative Computing A Programming Paradigm for Massively Parallel Computers"},{"key":"ref2","article-title":"More Moore, White Paper","year":"2016"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/ICRC.2016.7738674"},{"key":"ref1","year":"2016","journal-title":"Beyond CMOS (Emerging Research Devices) White Paper"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1145\/2228360.2228504"},{"key":"ref22","first-page":"1497","article-title":"Approximate associative memristive memory for energy-efficient GPUs","author":"rahimi","year":"2015","journal-title":"Proc Design Automation Test Eur Conf Exhib"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1145\/1806799.1806808"},{"key":"ref24","article-title":"Resistive CAM acceleration for tunable approximate computing","author":"imani","year":"0","journal-title":"IEEE Trans Emerg Topics Comput"},{"key":"ref41","doi-asserted-by":"publisher","DOI":"10.1145\/2830772.2830810"},{"key":"ref23","first-page":"1327","article-title":"Resistive configurable associative memory for approximate computing","author":"imani","year":"2016","journal-title":"Proc Eur Conf Exhib Design Autom Test"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2017.8203756"},{"key":"ref25","first-page":"159","article-title":"Approximate in-memory Hamming distance calculation with a memristive associative memory","author":"taha","year":"2016","journal-title":"Proc IEEE\/ACM Int Symp Nanoscale Archit (NANOARCH)"}],"container-title":["IEEE Journal on Emerging and Selected Topics in Circuits and Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/5503868\/8571018\/08402197.pdf?arnumber=8402197","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,27]],"date-time":"2022-01-27T02:34:33Z","timestamp":1643250873000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/8402197\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2018,12]]},"references-count":41,"journal-issue":{"issue":"4"},"URL":"https:\/\/doi.org\/10.1109\/jetcas.2018.2852701","relation":{},"ISSN":["2156-3357","2156-3365"],"issn-type":[{"value":"2156-3357","type":"print"},{"value":"2156-3365","type":"electronic"}],"subject":[],"published":{"date-parts":[[2018,12]]}}}