{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,10,7]],"date-time":"2026-10-07T16:43:30Z","timestamp":1791391410885,"version":"4.3.3"},"reference-count":18,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"2","license":[{"start":{"date-parts":[[2022,6,1]],"date-time":"2022-06-01T00:00:00Z","timestamp":1654041600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2022,6,1]],"date-time":"2022-06-01T00:00:00Z","timestamp":1654041600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2022,6,1]],"date-time":"2022-06-01T00:00:00Z","timestamp":1654041600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/100000028","name":"Semiconductor Research Corporation","doi-asserted-by":"publisher","award":["2824.001"],"award-info":[{"award-number":["2824.001"]}],"id":[{"id":"10.13039\/100000028","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/100008562","name":"The University of Texas at Austin","doi-asserted-by":"publisher","id":[{"id":"10.13039\/100008562","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE J. Emerg. Sel. Topics Circuits Syst."],"published-print":{"date-parts":[[2022,6]]},"DOI":"10.1109\/jetcas.2022.3174148","type":"journal-article","created":{"date-parts":[[2022,5,10]],"date-time":"2022-05-10T19:37:48Z","timestamp":1652211468000},"page":"557-568","source":"Crossref","is-referenced-by-count":14,"title":["Enabling In-Memory Computations in Non-Volatile SRAM Designs"],"prefix":"10.1109","volume":"12","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-3563-8560","authenticated-orcid":false,"given":"Siddhartha Raman","family":"Sundara Raman","sequence":"first","affiliation":[{"name":"Department of Electrical and Computer Engineering, The University of Texas at Austin, Austin, TX, USA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-6733-1910","authenticated-orcid":false,"given":"S. S. Teja","family":"Nibhanupudi","sequence":"additional","affiliation":[{"name":"Department of Electrical and Computer Engineering, The University of Texas at Austin, Austin, TX, USA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-0258-6776","authenticated-orcid":false,"given":"Jaydeep P.","family":"Kulkarni","sequence":"additional","affiliation":[{"name":"Department of Electrical and Computer Engineering, The University of Texas at Austin, Austin, TX, USA"}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2006.874752"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1145\/344166.344182"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM.2006.346730"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/VLSIT.2015.7223641"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/VLSIC.2010.5560286"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2010.2084490"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2017.7870333"},{"key":"ref8","first-page":"32","article-title":"Dynamic behavior of SRAM data retention and a novel transient voltage collapse technique for 0.6 V 32 nm LP SRAM","author":"Wang","year":"2011","journal-title":"IEDM Tech. Dig."},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/CICC.2009.5280761"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/ASSCC.2013.6691028"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/VLSI-TSA.2019.8804697"},{"key":"ref12","article-title":"Binarized neural networks: Training deep neural networks with weights and activations constrained to +1 or -1","author":"Courbariaux","year":"2016","journal-title":"arXiv:1602.02830"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/SISPAD.2014.6931558"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2021.3067849"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2012.2185930"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC42613.2021.9365932"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1145\/3296957.3173177"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1016\/j.mejo.2016.04.006"}],"container-title":["IEEE Journal on Emerging and Selected Topics in Circuits and Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/5503868\/9794907\/09771423.pdf?arnumber=9771423","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,1,22]],"date-time":"2024-01-22T22:05:29Z","timestamp":1705961129000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9771423\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2022,6]]},"references-count":18,"journal-issue":{"issue":"2"},"URL":"https:\/\/doi.org\/10.1109\/jetcas.2022.3174148","relation":{},"ISSN":["2156-3357","2156-3365"],"issn-type":[{"value":"2156-3357","type":"print"},{"value":"2156-3365","type":"electronic"}],"subject":[],"published":{"date-parts":[[2022,6]]}}}