{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,25]],"date-time":"2026-03-25T15:53:20Z","timestamp":1774454000491,"version":"3.50.1"},"reference-count":52,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"2","license":[{"start":{"date-parts":[[2025,6,1]],"date-time":"2025-06-01T00:00:00Z","timestamp":1748736000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/creativecommons.org\/licenses\/by\/4.0\/legalcode"}],"funder":[{"name":"Institute of Information and Communications Technology Planning and Evaluation"},{"name":"Korean Government","award":["2022-0-01170"],"award-info":[{"award-number":["2022-0-01170"]}]},{"name":"Institute of Information and Communications Technology Planning and Evaluation (IITP) through the Artificial Intelligence Semiconductor Support Program to Nurture the Best Talents"},{"name":"Korean Government","award":["IITP-2025-RS-2023-00256472"],"award-info":[{"award-number":["IITP-2025-RS-2023-00256472"]}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE J. Emerg. Sel. Topics Circuits Syst."],"published-print":{"date-parts":[[2025,6]]},"DOI":"10.1109\/jetcas.2025.3561777","type":"journal-article","created":{"date-parts":[[2025,4,17]],"date-time":"2025-04-17T17:42:01Z","timestamp":1744911721000},"page":"299-311","source":"Crossref","is-referenced-by-count":1,"title":["An Overview of Neural Rendering Accelerators: Challenges, Trends, and Future Directions"],"prefix":"10.1109","volume":"15","author":[{"ORCID":"https:\/\/orcid.org\/0000-0001-8147-3085","authenticated-orcid":false,"given":"Junha","family":"Ryu","sequence":"first","affiliation":[{"name":"School of Electrical Engineering, Korea Advanced Institute of Science and Technology (KAIST), Daejeon, South Korea"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-6661-4879","authenticated-orcid":false,"given":"Hoi-Jun","family":"Yoo","sequence":"additional","affiliation":[{"name":"School of Electrical Engineering, Korea Advanced Institute of Science and Technology (KAIST), Daejeon, South Korea"}]}],"member":"263","reference":[{"key":"ref1","volume-title":"Blender","year":"2024"},{"key":"ref2","volume-title":"Autodesk 3ds Max","year":"2024"},{"key":"ref3","volume-title":"Houdini","year":"2024"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1111\/cgf.14507"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/ICCV48922.2021.00572"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/CVPR46437.2021.00713"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-031-19821-2_41"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/ICCV51070.2023.01808"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/TVCG.2023.3283400"},{"key":"ref10","first-page":"1","article-title":"DreamFusion: Text-to-3D using 2D diffusion","volume-title":"Proc. Int. Conf. Learn. Represent. (ICLR)","author":"Poole"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-7091-6756-4_6"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/DAC56929.2023.10247710"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC49657.2024.10454276"},{"key":"ref14","first-page":"1","article-title":"RT-NeRF: Real-time on-device neural radiance fields towards immersive AR\/VR rendering","volume-title":"Proc. IEEE\/ACM Int. Conf. Comput. Aided Design (ICCAD)","author":"Li"},{"key":"ref15","volume-title":"NVIDIA Jetson Nano","year":"2024"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-031-19824-3_20"},{"key":"ref17","volume-title":"NVIDIA Jetson TX2","year":"2024"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1145\/3528223.3530127"},{"key":"ref19","volume-title":"NVIDIA Jetson Xavier NX","year":"2024"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/CVPR.2016.90"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.48550\/arXiv.2010.11929"},{"key":"ref22","article-title":"Neural rendering and its hardware acceleration: A review","author":"Yan","year":"2024","journal-title":"arXiv:2402.00028"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/CVPR52688.2022.01256"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-030-58452-8_24"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/CVPR52688.2022.00538"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/CVPR52688.2022.00542"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/2945.468400"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/ICCV48922.2021.01407"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC42615.2023.10067447"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2023.3291871"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2023.3328965"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2024.3447701"},{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1109\/CICC60959.2024.10529071"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2024.3458032"},{"key":"ref35","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO61859.2024.00016"},{"key":"ref36","volume-title":"NVIDIA RTX 2080Ti","year":"2024"},{"key":"ref37","doi-asserted-by":"publisher","DOI":"10.1145\/3579371.3589056"},{"key":"ref38","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA59077.2024.00096"},{"key":"ref39","doi-asserted-by":"publisher","DOI":"10.1145\/3613424.3614250"},{"key":"ref40","doi-asserted-by":"publisher","DOI":"10.1145\/3579371.3589109"},{"key":"ref41","doi-asserted-by":"publisher","DOI":"10.1145\/3579371.3589115"},{"key":"ref42","doi-asserted-by":"publisher","DOI":"10.23919\/VLSITechnologyandCir57934.2023.10185399"},{"key":"ref43","doi-asserted-by":"publisher","DOI":"10.1109\/A-SSCC58667.2023.10347991"},{"key":"ref44","doi-asserted-by":"publisher","DOI":"10.1145\/3550454.3555505"},{"key":"ref45","doi-asserted-by":"publisher","DOI":"10.1109\/TCSVT.2024.3419761"},{"key":"ref46","doi-asserted-by":"publisher","DOI":"10.1109\/ICCV.2017.244"},{"key":"ref47","doi-asserted-by":"publisher","DOI":"10.1145\/3649329.3655684"},{"key":"ref48","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC49657.2024.10454487"},{"key":"ref49","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO61859.2024.00046"},{"key":"ref50","doi-asserted-by":"publisher","DOI":"10.1109\/VLSITechnologyandCir46783.2024.10631375"},{"key":"ref51","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-031-72667-5_24"},{"key":"ref52","doi-asserted-by":"publisher","DOI":"10.1145\/3687934"}],"container-title":["IEEE Journal on Emerging and Selected Topics in Circuits and Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/5503868\/11050007\/10967345.pdf?arnumber=10967345","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,26]],"date-time":"2025-06-26T04:29:03Z","timestamp":1750912143000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10967345\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2025,6]]},"references-count":52,"journal-issue":{"issue":"2"},"URL":"https:\/\/doi.org\/10.1109\/jetcas.2025.3561777","relation":{},"ISSN":["2156-3357","2156-3365"],"issn-type":[{"value":"2156-3357","type":"print"},{"value":"2156-3365","type":"electronic"}],"subject":[],"published":{"date-parts":[[2025,6]]}}}