{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,4]],"date-time":"2026-03-04T16:38:19Z","timestamp":1772642299360,"version":"3.50.1"},"reference-count":49,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"3","license":[{"start":{"date-parts":[[2025,9,1]],"date-time":"2025-09-01T00:00:00Z","timestamp":1756684800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2025,9,1]],"date-time":"2025-09-01T00:00:00Z","timestamp":1756684800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2025,9,1]],"date-time":"2025-09-01T00:00:00Z","timestamp":1756684800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE J. Emerg. Sel. Topics Circuits Syst."],"published-print":{"date-parts":[[2025,9]]},"DOI":"10.1109\/jetcas.2025.3590744","type":"journal-article","created":{"date-parts":[[2025,7,21]],"date-time":"2025-07-21T18:09:12Z","timestamp":1753121352000},"page":"427-437","source":"Crossref","is-referenced-by-count":3,"title":["Heterogeneous Integration in Co-Packaged Optics"],"prefix":"10.1109","volume":"15","author":[{"ORCID":"https:\/\/orcid.org\/0000-0003-2313-7790","authenticated-orcid":false,"given":"Yu-Tao","family":"Yang","sequence":"first","affiliation":[{"name":"MediaTek USA Inc., San Jose, CA, USA"}]},{"given":"Chih-Ming","family":"Hung","sequence":"additional","affiliation":[{"name":"MediaTek Inc., Hsinchu Science Park, Hsinchu, Taiwan"}]}],"member":"263","reference":[{"key":"ref1","article-title":"Challenges and opportunities to illustrate the AI world with silicon photonics","volume-title":"Proc. Silicon Photonics Global Summit SEMICON","author":"Hung"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/ijcnn55064.2022.9891914"},{"key":"ref3","volume-title":"The Decadal Plan for Semiconductors","year":"2023"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/ted.2010.2099870"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1049\/ote2.12020"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/hcs61935.2024.10664787"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/isscc42615.2023.10067613"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/isscc42613.2021.9365752"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/isscc19947.2020.9062925"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/isscc.2019.8662523"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC49661.2025.10904601"},{"key":"ref12","volume-title":"MediaTek Partners With Ranovus to Enter Niche Market, Expands Into Heterogeneous Integration Co-Packaged Optics Industry","year":"2025"},{"key":"ref13","volume-title":"Broadcom\u2019s Persistent Cadence of Co-Packaged Optics Innovation","year":"2025"},{"key":"ref14","volume-title":"Intel Combines Optics to Its Tofino 2 Switch Chip","year":"2025"},{"key":"ref15","volume-title":"Cisco Demonstrates Co-Packaged Optics (CPO) System At OFC 2023","year":"2025"},{"key":"ref16","volume-title":"Marvell Teralynx 10 Announced for 51.2T 800GbE Switching","year":"2025"},{"key":"ref17","article-title":"Microsystem integration for AI\/compute and interface wishes from designers","volume-title":"Proc. IEEE EPS PANEL: Heterogeneous Integration Roadmap Compact Session, Int. Microsystems, Packag., Assem.   Circuits Technol. Conf. (IMPACT)","author":"Hung"},{"key":"ref18","volume-title":"International Technology Roadmap for Semiconductors (ITRS)","year":"2011"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/iedm45741.2023.10413754"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1016\/j.prime.2021.100009"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/ectc51909.2023.00356"},{"key":"ref22","volume-title":"Carbon Nanotube Thermal Interface Material (CNT-TIM)","year":"2024"},{"key":"ref23","article-title":"Topology optimization for embedded cooling of multiple and transient workloads in 3D semiconductor packages","volume-title":"Proc. Intersociety Conf.  Thermal   Thermomechanical Phenomena   Electronic Syst. (ITherm)","author":"Wu"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/ectc51529.2024.00279"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/edaps.2017.8277051"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/ectc51529.2024.00176"},{"key":"ref27","article-title":"Robust circuit\/architecture co-design for chiplet integration","volume-title":"IEEE Int. Solid-State Circuits Conf. (ISSCC) Dig. Tech. Papers","author":"Wu"},{"key":"ref28","article-title":"Highlights and challenges in deploying 100G+ SerDes","volume-title":"IEEE Int. Solid-State Circuits Conf. (ISSCC) Dig. Tech. Papers","author":"Lin"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/isscc42614.2022.9731673"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1109\/tcpmt.2020.3041412"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1109\/dac18074.2021.9586194"},{"key":"ref32","first-page":"1","article-title":"304 channel MicroLED based CMOS transceiver IC with aggregate 1 Tbps and sub-pJ per bit capability","volume-title":"Proc. Opt. Fiber Commun. Conf. (OFC)","author":"Pezeshki"},{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.37188\/lam.2021.005"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.1109\/mnano.2019.2891369"},{"key":"ref35","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM50854.2024.10873589"},{"key":"ref36","volume-title":"Self-Aligning Optics for Large Assembly Tolerances","year":"2025"},{"key":"ref37","doi-asserted-by":"publisher","DOI":"10.1109\/jlt.2023.3285149"},{"key":"ref38","doi-asserted-by":"publisher","DOI":"10.1364\/prj.7.000201"},{"key":"ref39","doi-asserted-by":"publisher","DOI":"10.1109\/ectc.2015.7159680"},{"key":"ref40","doi-asserted-by":"publisher","DOI":"10.1109\/ectc.2018.00170"},{"key":"ref41","doi-asserted-by":"publisher","DOI":"10.1109\/ectc32862.2020.00034"},{"key":"ref42","volume-title":"IBM,  Assembly and Test","year":"2025"},{"key":"ref43","doi-asserted-by":"publisher","DOI":"10.1109\/ectc.2018.00130"},{"key":"ref44","doi-asserted-by":"publisher","DOI":"10.1364\/ofc.2023.tu3b.2"},{"key":"ref45","doi-asserted-by":"publisher","DOI":"10.1109\/3dic48104.2019.9058779"},{"key":"ref46","doi-asserted-by":"publisher","DOI":"10.1109\/jstqe.2020.2975656"},{"key":"ref47","doi-asserted-by":"publisher","DOI":"10.1109\/ectc51529.2024.00227"},{"key":"ref48","first-page":"1","article-title":"Low-loss, multi-reticle stitched SiN waveguides for 300 mm wafer-level optical interconnects","volume-title":"Proc. Opt. Fiber Commun. Conf. (OFC)","author":"Xu"},{"key":"ref49","volume-title":"Heterogeneous Integration Roadmap 2023: Chapter 9 Integrated Photonics","year":"2023"}],"container-title":["IEEE Journal on Emerging and Selected Topics in Circuits and Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/5503868\/11164456\/11087222.pdf?arnumber=11087222","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,9,16]],"date-time":"2025-09-16T17:34:36Z","timestamp":1758044076000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/11087222\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2025,9]]},"references-count":49,"journal-issue":{"issue":"3"},"URL":"https:\/\/doi.org\/10.1109\/jetcas.2025.3590744","relation":{},"ISSN":["2156-3357","2156-3365"],"issn-type":[{"value":"2156-3357","type":"print"},{"value":"2156-3365","type":"electronic"}],"subject":[],"published":{"date-parts":[[2025,9]]}}}