{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,12,24]],"date-time":"2025-12-24T18:52:14Z","timestamp":1766602334829,"version":"3.48.0"},"reference-count":44,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"4","license":[{"start":{"date-parts":[[2025,12,1]],"date-time":"2025-12-01T00:00:00Z","timestamp":1764547200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/creativecommons.org\/licenses\/by\/4.0\/legalcode"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE J. Emerg. Sel. Topics Circuits Syst."],"published-print":{"date-parts":[[2025,12]]},"DOI":"10.1109\/jetcas.2025.3591559","type":"journal-article","created":{"date-parts":[[2025,7,22]],"date-time":"2025-07-22T18:05:53Z","timestamp":1753207553000},"page":"585-598","source":"Crossref","is-referenced-by-count":0,"title":["Chiplets Interface Protocol (ChIP) for Ultra-Large-Scale Applications"],"prefix":"10.1109","volume":"15","author":[{"ORCID":"https:\/\/orcid.org\/0009-0006-6350-0055","authenticated-orcid":false,"given":"Arvin","family":"Delavari","sequence":"first","affiliation":[{"name":"Department of Electrical Engineering and Computer Science, University of California, Irvine, Irvine, CA, USA"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-6176-5918","authenticated-orcid":false,"given":"Boris","family":"Vaisband","sequence":"additional","affiliation":[{"name":"Department of Electrical Engineering and Computer Science, University of California, Irvine, Irvine, CA, USA"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/EDR.2024.3501214"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1002\/047134608X.W8433"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1145\/2976742"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/ISVLSI.2002.1016885"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/ECTC.2016.201"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/ECTC.2016.65"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/ECTC51909.2023.00174"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/TCPMT.2021.3075219"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/CICC48029.2020.9075901"},{"volume-title":"Microelectronics and Advanced Packaging Technologies Roadmap (MAPT)","year":"2023","key":"ref10"},{"key":"ref11","first-page":"41","article-title":"Fine-grained DRAM: Energy-efficient DRAM for extreme bandwidth systems","volume-title":"Proc. 50th Annu. IEEE\/ACM Int. Symp. Microarchitecture (MICRO)","author":"O\u2019Connor"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/IMW.2017.7939084"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/OJSSCS.2024.3506694"},{"key":"ref14","first-page":"47","article-title":"TSMC packaging technologies for chiplets and 3D","volume-title":"Proc. IEEE Hot Chips Symp. (HCS)","author":"Yu"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2021.3061394"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/ECTC32696.2021.00166"},{"volume-title":"AMBA AXI Protocol Specification","year":"2023","key":"ref17"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.23919\/DATE54114.2022.9774617"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2019.2950352"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/HOTI51249.2020.00017"},{"volume-title":"ODSA BoW Specification","year":"2023","key":"ref21"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/HOTI51249.2020.00016"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/TCPMT.2022.3207195"},{"volume-title":"CXL\u00ae 3.2 Specification","year":"2022","key":"ref24"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2023.3235770"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2019.2960207"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/hotchips.2016.7936211"},{"volume-title":"Accelerating Innovation Through a Standard Chiplet Interface: The Advanced Interface Bus (AIB)","year":"2025","author":"Kehlet","key":"ref28"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/ECTC.2018.00197"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1109\/ECTC.2017.246"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1147\/JRD.2019.2940427"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1109\/ISQED.2018.8357278"},{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1109\/SLIP.2019.8771326"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.1109\/ECTC51529.2024.00379"},{"key":"ref35","doi-asserted-by":"publisher","DOI":"10.1145\/3313231.3352379"},{"key":"ref36","first-page":"1","article-title":"Architecture, chip, and package co-design flow for 2.5D IC design enabling heterogeneous IP reuse","volume-title":"Proc. 56th Annu. Design Autom. Conf.","author":"Kim"},{"volume-title":"JEDEC Standard JESD235D: High Bandwidth Memory (HBM) DRAM","year":"2021","key":"ref37"},{"key":"ref38","doi-asserted-by":"publisher","DOI":"10.1109\/isscc.2016.7417967"},{"key":"ref39","doi-asserted-by":"publisher","DOI":"10.1109\/TCPMT.2020.3022760"},{"key":"ref40","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2020.2976067"},{"key":"ref41","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2018.2876688"},{"key":"ref42","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2023.3258906"},{"key":"ref43","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2024.3386628"},{"key":"ref44","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2022.3212685"}],"container-title":["IEEE Journal on Emerging and Selected Topics in Circuits and Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/5503868\/11313699\/11088081.pdf?arnumber=11088081","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,12,24]],"date-time":"2025-12-24T18:46:31Z","timestamp":1766601991000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/11088081\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2025,12]]},"references-count":44,"journal-issue":{"issue":"4"},"URL":"https:\/\/doi.org\/10.1109\/jetcas.2025.3591559","relation":{},"ISSN":["2156-3357","2156-3365"],"issn-type":[{"type":"print","value":"2156-3357"},{"type":"electronic","value":"2156-3365"}],"subject":[],"published":{"date-parts":[[2025,12]]}}}