{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,3,22]],"date-time":"2025-03-22T09:19:23Z","timestamp":1742635163912},"reference-count":78,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"4","license":[{"start":{"date-parts":[[2010,4,1]],"date-time":"2010-04-01T00:00:00Z","timestamp":1270080000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["Proc. IEEE"],"published-print":{"date-parts":[[2010,4]]},"DOI":"10.1109\/jproc.2009.2036747","type":"journal-article","created":{"date-parts":[[2010,3,30]],"date-time":"2010-03-30T19:42:30Z","timestamp":1269978150000},"page":"584-602","source":"Crossref","is-referenced-by-count":14,"title":["Hardware\/Software Codesign of Aerospace and Automotive Systems"],"prefix":"10.1109","volume":"98","author":[{"given":"A.","family":"Abdallah","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"E.M.","family":"Feron","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"G.","family":"Hellestrand","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"P.","family":"Koopman","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"M.","family":"Wolf","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref73","first-page":"4-1533","article-title":"security considerations for the e-enabled aircraft","volume":"4","author":"wargo","year":"2003","journal-title":"Proc IEEE Aerosp Conf"},{"key":"ref72","first-page":"67","article-title":"measurement based worst-case execution time analysis using automatic test-data generation","author":"kirner","year":"2004","journal-title":"Proc Int Workshop Worst-Case Execution Time Analysis (WCET '04)"},{"key":"ref71","first-page":"190","article-title":"experimental evaluation of code properties for wcet analysis","author":"colin","year":"2003","journal-title":"Proc IEEE Real-Time Systems Symp (RTSS)"},{"key":"ref70","author":"bernat","year":"2003","journal-title":"Pwcet A Tool for Probabilistic Worst-Case Execution Time Analysis of Real-Time Syst"},{"key":"ref76","doi-asserted-by":"publisher","DOI":"10.1109\/DSN.2009.5270339"},{"key":"ref77","doi-asserted-by":"publisher","DOI":"10.1109\/DSN.2009.5270342"},{"key":"ref74","article-title":"automotive industry in europe takes the lead in the introduction of optical data buses","author":"polishuk","year":"2001","journal-title":"Wiring Harness News"},{"key":"ref39","doi-asserted-by":"publisher","DOI":"10.1109\/EMRTS.2001.933993"},{"key":"ref75","first-page":"57","article-title":"challenges in deeply networked system survivability","author":"koopman","year":"2005","journal-title":"NATO Adv Res Workshop Security Embed Syst"},{"key":"ref38","doi-asserted-by":"publisher","DOI":"10.1109\/EMWRTS.1998.685079"},{"key":"ref78","doi-asserted-by":"publisher","DOI":"10.1145\/1347375.1347389"},{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1109\/RTTAS.1999.777663"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1023\/A:1008189014032"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1109\/RTTAS.1998.683183"},{"key":"ref30","first-page":"469","article-title":"reliable and precise wcet determination for a real-life processor","author":"ferdinand","year":"2001","journal-title":"Proc First Int Workshop Embed Software (EMSOFT 2001)"},{"key":"ref37","doi-asserted-by":"publisher","DOI":"10.1016\/S1383-7621(00)00053-9"},{"key":"ref36","doi-asserted-by":"publisher","DOI":"10.1145\/384198.384211"},{"key":"ref35","article-title":"worst-case execution-time analysis for digital signal processors","author":"holsti","year":"2000","journal-title":"Proc EUSIPCO Conf (X Eur Signal Process )"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.1023\/A:1008149332687"},{"key":"ref60","doi-asserted-by":"publisher","DOI":"10.1016\/S1383-7621(99)00010-7"},{"key":"ref62","doi-asserted-by":"publisher","DOI":"10.1109\/2.76286"},{"key":"ref61","doi-asserted-by":"publisher","DOI":"10.1109\/EMRTS.2001.933995"},{"key":"ref63","doi-asserted-by":"publisher","DOI":"10.1109\/RTCSA.2000.896369"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1023\/A:1008138407139"},{"key":"ref64","doi-asserted-by":"publisher","DOI":"10.1109\/43.664229"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1016\/S1383-7621(99)00010-7"},{"key":"ref65","doi-asserted-by":"publisher","DOI":"10.1023\/A:1007905003094"},{"key":"ref66","doi-asserted-by":"publisher","DOI":"10.1109\/REAL.2000.896006"},{"key":"ref29","doi-asserted-by":"crossref","first-page":"1298","DOI":"10.1007\/BFb0002886","article-title":"deriving annotations for tight calculation of execution time","author":"ermedahl","year":"1997","journal-title":"Proc 3rd Int Euro-Par Conf Parallel Process"},{"key":"ref67","doi-asserted-by":"publisher","DOI":"10.1007\/b97673"},{"key":"ref68","doi-asserted-by":"publisher","DOI":"10.1109\/REAL.2001.990614"},{"key":"ref69","doi-asserted-by":"crossref","first-page":"279","DOI":"10.1109\/REAL.2002.1181582","article-title":"wcet analysis of probabilistic hard real-time systems","author":"bernat","year":"2002","journal-title":"Proc IEEE Real-Time Systems Symp (RTSS)"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/54.232470"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/5.293155"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1145\/363235.363259"},{"key":"ref22","author":"feron","year":"2008","journal-title":"Control software analysis Part I and II"},{"key":"ref21","first-page":"21","article-title":"the astre analyzer","volume":"3444","author":"cousot","year":"2005","journal-title":"Proc 14th Eur Symp Program (ESOP 2005)"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/ISORC.2005.19"},{"key":"ref23","author":"rinard","year":"1999","journal-title":"Credible compilation"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/EMWRTS.1996.557827"},{"key":"ref25","article-title":"integrated program proof and worstcase timing analysis of spark ada","author":"chapman","year":"1994","journal-title":"Proc ACM Workshop Lang Compiler Tool Support for Real-Time Syst (LCRTS '94)"},{"key":"ref50","doi-asserted-by":"crossref","first-page":"249","DOI":"10.1023\/A:1008149332687","article-title":"worst case execution time analysis for a processor with branch prediction","volume":"18","author":"colin","year":"2000","journal-title":"Real-Time Syst"},{"key":"ref51","first-page":"442","article-title":"making worst-case execution time analysis for hard realtime tasks on state of the art processors feasible","author":"farber","year":"1999","journal-title":"Proc IEEE Int Conf Real-Time Comput Syst Applicat (RTCSA '99)"},{"key":"ref59","doi-asserted-by":"publisher","DOI":"10.1109\/RTTAS.1999.777663"},{"key":"ref58","doi-asserted-by":"publisher","DOI":"10.1109\/RTCSA.2000.896433"},{"key":"ref57","first-page":"442","article-title":"making worst-case execution time analysis for hard realtime tasks on state of the art processors feasible","author":"farber","year":"1999","journal-title":"Proc IEEE Int Conf Real-Time Comput Syst Applicat (RTCSA '99)"},{"key":"ref56","doi-asserted-by":"publisher","DOI":"10.1109\/REAL.1999.818824"},{"key":"ref55","doi-asserted-by":"publisher","DOI":"10.1145\/314403.314432"},{"key":"ref54","doi-asserted-by":"publisher","DOI":"10.1109\/EMRTS.2001.933995"},{"key":"ref53","doi-asserted-by":"publisher","DOI":"10.1016\/S1383-7621(00)00053-9"},{"key":"ref52","doi-asserted-by":"publisher","DOI":"10.1109\/RTCSA.2000.896433"},{"key":"ref10","author":"leveson","year":"1995","journal-title":"Safeware"},{"key":"ref11","year":"1992","journal-title":"Software Considerations in Airborne Systems and Equipment Certification"},{"key":"ref40","doi-asserted-by":"publisher","DOI":"10.1109\/RTTAS.1999.777663"},{"key":"ref12","year":"1993","journal-title":"An Assessment of Space Shuttle Flight Software Development Processes"},{"key":"ref13","doi-asserted-by":"crossref","DOI":"10.1007\/978-1-4757-3540-6","author":"peled","year":"2001","journal-title":"Software Reliability Methods"},{"key":"ref14","author":"franklin","year":"1986","journal-title":"Feedback Control of Dynamic Systems"},{"key":"ref15","year":"2003","journal-title":"The Spin Model CheckerPrimer and Reference Manual"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/AERO.2002.1036832"},{"key":"ref17","author":"owre","year":"1992","journal-title":"PVS A Prototype Verification System From CADE 11"},{"key":"ref18","article-title":"formal verification of an optimal air traffic conflict resolution and recovery algorithm","author":"galdino","year":"2007","journal-title":"Proc 14th Workshop Logic Lang Inf Comput"},{"key":"ref19","doi-asserted-by":"crossref","first-page":"19","DOI":"10.1090\/psapm\/019\/0235771","article-title":"assigning meanings to programs","volume":"19","author":"floyd","year":"1967","journal-title":"Proc Symp Appl Math Aspects Comput Sci"},{"key":"ref4","author":"christensen","year":"1997","journal-title":"The Innovator s Dilemma"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/54.245964"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1016\/0167-6423(92)90005-V"},{"key":"ref5","author":"fine","year":"1998","journal-title":"Clock Speed Winning Industry Control in the Age of Temporary Advantage"},{"key":"ref8","first-page":"131","article-title":"modal: a system for digital hardware description and simulation","author":"hellestrand","year":"1979","journal-title":"Proc 4th Int Conf Hardware Description Lang"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1145\/359576.359579"},{"key":"ref49","doi-asserted-by":"publisher","DOI":"10.1016\/S1383-7621(99)00010-7"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1145\/367177.367199"},{"key":"ref46","first-page":"37","article-title":"applying compiler techniques to cache behavior prediction","author":"ferdinand","year":"1997","journal-title":"Proc ACM SIGPLAN Workshop Lang Compiler Tool Support Real-Time Syst (LCRTS '97)"},{"key":"ref45","article-title":"worst-case execution time analysis for modern hardware architectures","author":"ottosson","year":"1997","journal-title":"Proc ACM SIGPLAN Workshop Lang Compiler Tool Support Real-Time Syst (LCRTS '97)"},{"key":"ref48","doi-asserted-by":"publisher","DOI":"10.1109\/RTTAS.1997.601358"},{"key":"ref47","first-page":"29","article-title":"timing predictions for multi-level caches","author":"mueller","year":"1997","journal-title":"Proc ACM SIGPLAN Workshop Lang Compiler Tool Support Real-Time Syst (LCRTS '97)"},{"key":"ref42","first-page":"230","article-title":"efficient worst case timing analysis of data caching","author":"kim","year":"1996","journal-title":"Proc IEEE Real-Time Technol Applicat Symp (RTAS '96)"},{"key":"ref41","doi-asserted-by":"publisher","DOI":"10.1109\/32.392980"},{"key":"ref44","doi-asserted-by":"publisher","DOI":"10.1023\/A:1008138407139"},{"key":"ref43","doi-asserted-by":"publisher","DOI":"10.1109\/REAL.1996.563722"}],"container-title":["Proceedings of the IEEE"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/5\/5440047\/05440056.pdf?arnumber=5440056","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,10,11]],"date-time":"2021-10-11T01:00:27Z","timestamp":1633914027000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/5440056\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2010,4]]},"references-count":78,"journal-issue":{"issue":"4"},"URL":"https:\/\/doi.org\/10.1109\/jproc.2009.2036747","relation":{},"ISSN":["0018-9219","1558-2256"],"issn-type":[{"value":"0018-9219","type":"print"},{"value":"1558-2256","type":"electronic"}],"subject":[],"published":{"date-parts":[[2010,4]]}}}