{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,31]],"date-time":"2026-03-31T14:07:57Z","timestamp":1774966077015,"version":"3.50.1"},"reference-count":28,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"6","license":[{"start":{"date-parts":[[2012,6,1]],"date-time":"2012-06-01T00:00:00Z","timestamp":1338508800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2012,6,1]],"date-time":"2012-06-01T00:00:00Z","timestamp":1338508800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2012,6,1]],"date-time":"2012-06-01T00:00:00Z","timestamp":1338508800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["Proc. IEEE"],"published-print":{"date-parts":[[2012,6]]},"DOI":"10.1109\/jproc.2011.2166749","type":"journal-article","created":{"date-parts":[[2011,11,10]],"date-time":"2011-11-10T15:03:09Z","timestamp":1320937389000},"page":"2061-2070","source":"Crossref","is-referenced-by-count":257,"title":["Memristor Bridge Synapses"],"prefix":"10.1109","volume":"100","author":[{"given":"Hyongsuk","family":"Kim","sequence":"first","affiliation":[{"name":"Division of Electronics and Information Engineering, Chonbuk National University, Jeonju, Korea"}]},{"given":"Maheshwar Pd.","family":"Sah","sequence":"additional","affiliation":[{"name":"Division of Electronics and Information Engineering, Chonbuk National University, Jeonju, Korea"}]},{"given":"Changju","family":"Yang","sequence":"additional","affiliation":[{"name":"Division of Electronics and Information Engineering, Chonbuk National University, Jeonju, Korea"}]},{"given":"Tam\u00e1s","family":"Roska","sequence":"additional","affiliation":[{"name":"Computer and Automation Research Institute, Hungarian Academy of Sciences, Budapest, Hungary"}]},{"given":"Leon O.","family":"Chua","sequence":"additional","affiliation":[{"name":"Department of Electrical Engineering and Computer Sciences, University of California at Berkeley, Berkeley, CA, USA"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2010.2042891"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1088\/0143-0807\/30\/4\/001"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1098\/rspa.2009.0553"},{"key":"ref13","author":"wang","year":"2008","journal-title":"Memristor for Introductory Physics"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1016\/0038-1101(68)90092-0"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/TCT.1971.1083337"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/PROC.1976.10092"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1007\/s00339-011-6264-9"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1142\/S0218127409025031"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/CNNA.2010.5430320"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1063\/1.3236506"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/82.222815"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM.2005.1609463"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/31.7601"},{"key":"ref6","doi-asserted-by":"crossref","first-page":"2208","DOI":"10.1109\/TCSI.2005.853263","article-title":"High-performance Viterbi decoder with circularly connected 2-D CNN unilateral cell array","volume":"52","author":"kim","year":"2005","journal-title":"IEEE Trans Circuits Syst I Reg Papers"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1002\/cta.199"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1023\/A:1008278225960"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/4.597292"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/31.7600"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1038\/nature06932"},{"key":"ref1","year":"1999","journal-title":"The Scientific American Book of the Brain"},{"key":"ref20","doi-asserted-by":"crossref","first-page":"3640","DOI":"10.1021\/nl901874j","article-title":"Memristor&#x2014;CMOS hybrid integrated circuits for reconfigurable logic","volume":"9","author":"xia","year":"2009","journal-title":"Nano Lett"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2010.2061830"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1038\/nature08940"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1038\/nmat2023"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/TNANO.2006.880407"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1088\/0957-4484\/18\/36\/365202"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1021\/nl904092h"}],"container-title":["Proceedings of the IEEE"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/5\/6198299\/06074916.pdf?arnumber=6074916","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2026,2,24]],"date-time":"2026-02-24T20:58:26Z","timestamp":1771966706000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/6074916\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2012,6]]},"references-count":28,"journal-issue":{"issue":"6"},"URL":"https:\/\/doi.org\/10.1109\/jproc.2011.2166749","relation":{},"ISSN":["0018-9219","1558-2256"],"issn-type":[{"value":"0018-9219","type":"print"},{"value":"1558-2256","type":"electronic"}],"subject":[],"published":{"date-parts":[[2012,6]]}}}