{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,10,7]],"date-time":"2026-10-07T19:01:54Z","timestamp":1791399714513,"version":"4.3.3"},"reference-count":179,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"7","license":[{"start":{"date-parts":[[2016,7,1]],"date-time":"2016-07-01T00:00:00Z","timestamp":1467331200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"funder":[{"name":"NSF Variability Expeditions","award":["1029783"],"award-info":[{"award-number":["1029783"]}]},{"name":"ERC-AdG MultiTherman","award":["291125"],"award-info":[{"award-number":["291125"]}]},{"name":"FP7 Virtical","award":["288574"],"award-info":[{"award-number":["288574"]}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["Proc. IEEE"],"published-print":{"date-parts":[[2016,7]]},"DOI":"10.1109\/jproc.2016.2518864","type":"journal-article","created":{"date-parts":[[2016,3,7]],"date-time":"2016-03-07T19:09:09Z","timestamp":1457377749000},"page":"1410-1448","source":"Crossref","is-referenced-by-count":40,"title":["Variability Mitigation in Nanometer CMOS Integrated Systems: A Survey of Techniques From Circuits to Software"],"prefix":"10.1109","volume":"104","author":[{"given":"Abbas","family":"Rahimi","sequence":"first","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Luca","family":"Benini","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Rajesh K.","family":"Gupta","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref170","doi-asserted-by":"publisher","DOI":"10.1109\/IOLTS.2011.5993811"},{"key":"ref172","doi-asserted-by":"publisher","DOI":"10.1166\/jolpe.2011.1141"},{"key":"ref171","doi-asserted-by":"publisher","DOI":"10.1109\/TSM.2007.913186"},{"key":"ref174","year":"0","journal-title":"Amd app sdk v2 5"},{"key":"ref173","doi-asserted-by":"publisher","DOI":"10.1109\/ISPASS.2011.5762740"},{"key":"ref176","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2012.6176639"},{"key":"ref175","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2011.5763085"},{"key":"ref178","author":"rahimi","year":"2014","journal-title":"Analysis of Cross-Layer Vulnerability to Variations An Adaptive Instruction-Level to Task-Level Approach"},{"key":"ref177","year":"0","journal-title":"The GNU project GOMP?An openMP implementation for GCC"},{"key":"ref168","first-page":"112","article-title":"Tunable replica circuits and adaptive voltage-frequency techniques for dynamic voltage, temperature, and aging variation tolerance","author":"tschanz","year":"0","journal-title":"Proc Symp VLSI Circuits"},{"key":"ref169","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2013.52"},{"key":"ref39","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2014.2317137"},{"key":"ref38","doi-asserted-by":"publisher","DOI":"10.1145\/996566.996588"},{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2007.896305"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2006.37"},{"key":"ref31","first-page":"429","article-title":"Microarchitecture parameter selection to optimize system performance under process variation","author":"liang","year":"0","journal-title":"Proc 2006 IEEE\/ACM Int Conf Comput -Aided Des"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2009.4798233"},{"key":"ref37","doi-asserted-by":"crossref","first-page":"422","DOI":"10.1109\/ISSCC.2002.993112","article-title":"Adaptive body bias for reducing impacts of die-to-die and within-die parameter variations on microprocessor frequency and leakage","volume":"1","author":"tschanz","year":"0","journal-title":"Proc IEEE Int Solid-State Circuits Conf Digest Tech Papers (ISSCC 2002)"},{"key":"ref36","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2008.4771810"},{"key":"ref35","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2013.2297176"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2008.2007491"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1145\/2228360.2228555"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.7873\/DATE.2013.342"},{"key":"ref179","author":"rahimi","year":"2014","journal-title":"Temporal Memoization for Energy-Efficient Timing Error Recovery in GPGPU Architectures"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1145\/2463209.2488860"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2012.6176659"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1145\/2593069.2596694"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/ISICir.2011.6131919"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1145\/2333660.2333754"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2013.72"},{"key":"ref101","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2012.48"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1145\/2463209.2488754"},{"key":"ref100","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2011.2179038"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2009.5090793"},{"key":"ref50","doi-asserted-by":"publisher","DOI":"10.1109\/ASYNC.2012.23"},{"key":"ref51","doi-asserted-by":"publisher","DOI":"10.1145\/1065579.1065588"},{"key":"ref154","first-page":"292","article-title":"Adaptive frequency and biasing techniques for tolerance to dynamic temperature-voltage variations and aging","author":"tschanz","year":"0","journal-title":"Proc IEEE Int Solid-State Circuits Conf (ISSCC 2007) Digest Tech Papers"},{"key":"ref153","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2005.859902"},{"key":"ref156","doi-asserted-by":"publisher","DOI":"10.1109\/ESSCIRC.2008.4681810"},{"key":"ref155","doi-asserted-by":"publisher","DOI":"10.1109\/VLSIC.2003.1221200"},{"key":"ref150","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2011.2108141"},{"key":"ref152","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2011.2163894"},{"key":"ref151","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2010.5654280"},{"key":"ref146","doi-asserted-by":"publisher","DOI":"10.1145\/996566.996592"},{"key":"ref147","doi-asserted-by":"publisher","DOI":"10.1145\/2228360.2228409"},{"key":"ref148","first-page":"398","article-title":"A distributed critical-path timing monitor for a 65 nm high-performance microprocessor","author":"drake","year":"0","journal-title":"Proc IEEE Int Solid-State Circuits Conf (ISSCC 2007) Digest Tech Papers"},{"key":"ref149","first-page":"112","article-title":"Tunable replica circuits and adaptive voltage-frequency techniques for dynamic voltage, temperature, and aging variation tolerance","author":"tschanz","year":"0","journal-title":"Proc Symp VLSI Circuits"},{"key":"ref59","doi-asserted-by":"publisher","DOI":"10.1109\/DFTVS.2001.966800"},{"key":"ref58","doi-asserted-by":"publisher","DOI":"10.1109\/TC.1984.1676475"},{"key":"ref57","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2011.2161784"},{"key":"ref56","doi-asserted-by":"publisher","DOI":"10.1145\/1950365.1950405"},{"key":"ref55","author":"lai","year":"2014","journal-title":"A case study of logic delay fault behaviors on general-purpose embedded processor under voltage overscaling"},{"key":"ref54","year":"0","journal-title":"EEMBC Benchmark Consortium"},{"key":"ref53","doi-asserted-by":"publisher","DOI":"10.1145\/2463209.2488871"},{"key":"ref52","doi-asserted-by":"publisher","DOI":"10.1145\/2228360.2228568"},{"key":"ref40","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2013.52"},{"key":"ref167","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2013.2275653"},{"key":"ref166","doi-asserted-by":"publisher","DOI":"10.7873\/DATE.2013.070"},{"key":"ref165","doi-asserted-by":"publisher","DOI":"10.1109\/ISQED.2007.23"},{"key":"ref164","doi-asserted-by":"publisher","DOI":"10.1109\/NORCHP.2011.6126746"},{"key":"ref163","first-page":"264","article-title":"Razor-lite: A side-channel error-detection register for timing-margin recovery in 45 nm soi cmos","author":"kim","year":"0","journal-title":"Proc IEEE Int Solid-State Circuits Conf Digest Tech Papers (ISSCC)"},{"key":"ref162","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2008.4523226"},{"key":"ref161","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2013.2237972"},{"key":"ref160","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2012.2218067"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/TSM.2009.2031789"},{"key":"ref3","year":"0","journal-title":"ITRS Website"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/CICC.2010.5617415"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/TDMR.2008.915629"},{"key":"ref159","first-page":"994","article-title":"Embedding statistical tests for on-chip dynamic voltage and temperature monitoring","author":"vincent","year":"0","journal-title":"Design Automation Conference (DAC) 49th ACM\/EDAC\/IEEE"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/ESSCIRC.2010.5619757"},{"key":"ref49","doi-asserted-by":"publisher","DOI":"10.1109\/JETCAS.2013.2243031"},{"key":"ref7","first-page":"110","article-title":"Temperature control of high-performance multi-core platforms using convex optimization","author":"murali","year":"0","journal-title":"Proc Conf Des Autom Test Eur"},{"key":"ref157","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2008.2010399"},{"key":"ref158","doi-asserted-by":"publisher","DOI":"10.1109\/TSM.2005.863244"},{"key":"ref9","first-page":"2","article-title":"Opportunities and challenges for better than worst-case design","author":"austin","year":"0","journal-title":"Proc 2005 Conf Asia South Pacific Des Autom"},{"key":"ref46","first-page":"825","article-title":"Slack redistribution for graceful degradation under voltage overscaling","author":"kahng","year":"0","journal-title":"Proc 2010 15th Asia South Pacific Design Autom Conf (ASP-DAC)"},{"key":"ref45","doi-asserted-by":"publisher","DOI":"10.1145\/513918.513935"},{"key":"ref48","doi-asserted-by":"publisher","DOI":"10.1109\/JETCAS.2011.2163689"},{"key":"ref47","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2012.2231034"},{"key":"ref42","first-page":"250","article-title":"A 45 nm 48-core ia processor with variation-aware scheduling and optimal core mapping","author":"dighe","year":"0","journal-title":"Proc 2011 Symp VLSI Circuits (VLSIC)"},{"key":"ref41","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2011.2160001"},{"key":"ref44","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2010.2089657"},{"key":"ref43","first-page":"284","article-title":"A power-efficient 32 b arm isa processor using timing-error detection and correction for transient-error tolerance and adaptation to pvt variation","author":"bull","year":"0","journal-title":"Proc 2010 IEEE Int Solid-State Circuits Conf Digest Tech Papers (ISSCC)"},{"key":"ref127","first-page":"195:1","article-title":"Energy-efficient gpgpu architectures via collaborative compilation and memristive memory-based computing","author":"rahimi","year":"0","journal-title":"Proc 51st Annu Design Autom Conf"},{"key":"ref126","first-page":"1","article-title":"Temporal memoization for energy-efficient timing error recovery in gpgpus","author":"rahimi","year":"0","journal-title":"Proc Design Autom Test Eur Conf Exhib"},{"key":"ref125","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2013.2281934"},{"key":"ref124","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2011.79"},{"key":"ref73","doi-asserted-by":"publisher","DOI":"10.1145\/2593069.2593184"},{"key":"ref72","doi-asserted-by":"publisher","DOI":"10.1145\/1250662.1250703"},{"key":"ref129","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2013.6522312"},{"key":"ref71","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2008.4523228"},{"key":"ref128","first-page":"1497","article-title":"Approximate associative memristive memory for energy-efficient gpus","author":"rahimi","year":"0","journal-title":"Proc 2015 Design Autom Test Eur Conf Exhib"},{"key":"ref70","doi-asserted-by":"publisher","DOI":"10.1145\/2380445.2380457"},{"key":"ref76","doi-asserted-by":"publisher","DOI":"10.1109\/12.54848"},{"key":"ref130","first-page":"244","article-title":"13.8 a 32 kb sram for error-free and error-tolerant applications with dynamic energy-quality management in 28 nm cmos","author":"frustaci","year":"0","journal-title":"Proc IEEE Int Solid-State Circuits Conf Digest Tech Papers (ISSCC)"},{"key":"ref77","doi-asserted-by":"publisher","DOI":"10.1145\/545214.545228"},{"key":"ref74","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2004.840407"},{"key":"ref75","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2003.1253179"},{"key":"ref133","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2013.6691097"},{"key":"ref134","doi-asserted-by":"publisher","DOI":"10.1145\/360128.360166"},{"key":"ref131","doi-asserted-by":"publisher","DOI":"10.7873\/DATE.2015.0783"},{"key":"ref78","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2012.6237021"},{"key":"ref132","doi-asserted-by":"publisher","DOI":"10.1145\/1837274.1837481"},{"key":"ref79","doi-asserted-by":"publisher","DOI":"10.1145\/2228360.2228485"},{"key":"ref136","doi-asserted-by":"publisher","DOI":"10.1109\/ASSCC.2013.6690974"},{"key":"ref135","doi-asserted-by":"publisher","DOI":"10.1145\/2228360.2228509"},{"key":"ref138","first-page":"903","article-title":"Approximate logic circuits for low overhead, non-intrusive concurrent error detection","author":"choudhury","year":"0","journal-title":"Proc Design Autom Test Eur (DATE)"},{"key":"ref137","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2013.2284364"},{"key":"ref60","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2009.2016714"},{"key":"ref139","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2013.2250581"},{"key":"ref62","doi-asserted-by":"publisher","DOI":"10.1109\/12.2145"},{"key":"ref61","doi-asserted-by":"publisher","DOI":"10.1109\/ICDSN.2000.857510"},{"key":"ref63","doi-asserted-by":"publisher","DOI":"10.1109\/DSN.2013.6575309"},{"key":"ref64","doi-asserted-by":"publisher","DOI":"10.1109\/ISIT.2012.6282078"},{"key":"ref140","doi-asserted-by":"publisher","DOI":"10.1145\/1993498.1993518"},{"key":"ref65","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-642-28293-5_3"},{"key":"ref141","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2012.2223467"},{"key":"ref66","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2012.6176589"},{"key":"ref142","doi-asserted-by":"publisher","DOI":"10.1109\/JETCAS.2011.2135590"},{"key":"ref67","doi-asserted-by":"publisher","DOI":"10.1145\/2380356.2380375"},{"key":"ref143","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2010.5654129"},{"key":"ref68","doi-asserted-by":"publisher","DOI":"10.1109\/HiPC.2012.6507476"},{"key":"ref144","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2010.5456960"},{"key":"ref2","first-page":"338","article-title":"Parameter variations and impact on circuits and microarchitecture","author":"borkar","year":"0","journal-title":"Proc Design Autom Conf"},{"key":"ref69","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2012.6176479"},{"key":"ref145","doi-asserted-by":"publisher","DOI":"10.1145\/2039370.2039384"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2001.912637"},{"key":"ref109","doi-asserted-by":"publisher","DOI":"10.1109\/DSN.2012.6263938"},{"key":"ref95","doi-asserted-by":"publisher","DOI":"10.1145\/2025113.2025133"},{"key":"ref108","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2011.2167360"},{"key":"ref94","doi-asserted-by":"publisher","DOI":"10.1145\/1806596.1806620"},{"key":"ref107","doi-asserted-by":"publisher","DOI":"10.1109\/TCSVT.2013.2243658"},{"key":"ref93","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2014.6742935"},{"key":"ref106","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2007.364664"},{"key":"ref92","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-540-74442-9_54"},{"key":"ref105","doi-asserted-by":"publisher","DOI":"10.1145\/2465787.2465789"},{"key":"ref91","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2005.859886"},{"key":"ref104","doi-asserted-by":"publisher","DOI":"10.1109\/MC.2004.1274006"},{"key":"ref90","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2004.85"},{"key":"ref103","doi-asserted-by":"publisher","DOI":"10.1145\/2540708.2540712"},{"key":"ref102","doi-asserted-by":"publisher","DOI":"10.1109\/TNNLS.2012.2199517"},{"key":"ref111","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2010.35"},{"key":"ref112","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2011.127"},{"key":"ref110","doi-asserted-by":"publisher","DOI":"10.1145\/1013235.1013315"},{"key":"ref98","doi-asserted-by":"publisher","DOI":"10.1145\/2540708.2540711"},{"key":"ref99","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2011.5763154"},{"key":"ref96","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-642-23702-7_24"},{"key":"ref97","doi-asserted-by":"publisher","DOI":"10.1145\/2414729.2414737"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2011.5763031"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2010.2057230"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.3390\/jlpea1030334"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2010.2080550"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2012.2231036"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1145\/1283780.1283789"},{"key":"ref118","doi-asserted-by":"publisher","DOI":"10.1109\/CODES-ISSS.2013.6659022"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2009.2034764"},{"key":"ref82","doi-asserted-by":"publisher","DOI":"10.1109\/ISLPED.2013.6629294"},{"key":"ref117","doi-asserted-by":"publisher","DOI":"10.1145\/2408776.2408794"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2011.2124477"},{"key":"ref81","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2012.6177103"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2012.2231039"},{"key":"ref84","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2012.190"},{"key":"ref119","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2009.5090651"},{"key":"ref19","first-page":"492","article-title":"A 530 mv 10-lane simd processor with variation resiliency in 45 nm soi","author":"pawlowski","year":"0","journal-title":"Proc IEEE Int Solid-State Circuits Conf Digest Tech Papers (ISSCC)"},{"key":"ref83","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2010.5457058"},{"key":"ref114","doi-asserted-by":"publisher","DOI":"10.1145\/2744769.2744915"},{"key":"ref113","doi-asserted-by":"publisher","DOI":"10.7873\/DATE.2013.121"},{"key":"ref116","first-page":"176:1","article-title":"Process variation-aware workload partitioning algorithms for gpus supporting spatial-multitasking","author":"aguilera","year":"0","journal-title":"Proc Conf Design Autom Test Eur"},{"key":"ref80","doi-asserted-by":"publisher","DOI":"10.1145\/1698759.1698767"},{"key":"ref115","doi-asserted-by":"publisher","DOI":"10.1109\/JETCAS.2014.2315883"},{"key":"ref120","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2011.2163635"},{"key":"ref89","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2008.2007148"},{"key":"ref121","doi-asserted-by":"publisher","DOI":"10.1145\/2228360.2228510"},{"key":"ref122","doi-asserted-by":"publisher","DOI":"10.1145\/2150976.2151008"},{"key":"ref123","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2005.119"},{"key":"ref85","doi-asserted-by":"publisher","DOI":"10.1109\/CICC.2010.5617392"},{"key":"ref86","doi-asserted-by":"publisher","DOI":"10.1109\/ICICDT.2011.5783192"},{"key":"ref87","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2009.5090638"},{"key":"ref88","doi-asserted-by":"publisher","DOI":"10.1145\/2463209.2488959"}],"container-title":["Proceedings of the IEEE"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/5\/7493709\/07426722.pdf?arnumber=7426722","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,12]],"date-time":"2022-01-12T16:40:13Z","timestamp":1642005613000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7426722\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2016,7]]},"references-count":179,"journal-issue":{"issue":"7"},"URL":"https:\/\/doi.org\/10.1109\/jproc.2016.2518864","relation":{},"ISSN":["0018-9219","1558-2256"],"issn-type":[{"value":"0018-9219","type":"print"},{"value":"1558-2256","type":"electronic"}],"subject":[],"published":{"date-parts":[[2016,7]]}}}