{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,2,26]],"date-time":"2026-02-26T15:45:47Z","timestamp":1772120747853,"version":"3.50.1"},"reference-count":117,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"6","license":[{"start":{"date-parts":[[2023,6,1]],"date-time":"2023-06-01T00:00:00Z","timestamp":1685577600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2023,6,1]],"date-time":"2023-06-01T00:00:00Z","timestamp":1685577600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-009"},{"start":{"date-parts":[[2023,6,1]],"date-time":"2023-06-01T00:00:00Z","timestamp":1685577600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-001"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["Proc. IEEE"],"published-print":{"date-parts":[[2023,6]]},"DOI":"10.1109\/jproc.2023.3276941","type":"journal-article","created":{"date-parts":[[2023,6,15]],"date-time":"2023-06-15T17:24:08Z","timestamp":1686849848000},"page":"561-574","source":"Crossref","is-referenced-by-count":10,"title":["Micro\/Nano Circuits and Systems Design and Design Automation: Challenges and Opportunities [Point of View]"],"prefix":"10.1109","volume":"111","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-3166-5529","authenticated-orcid":false,"given":"Gert","family":"Cauwenberghs","sequence":"first","affiliation":[{"name":"Department of Bioengineering, University of California at San Diego, La Jolla, CA, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-2887-6963","authenticated-orcid":false,"given":"Jason","family":"Cong","sequence":"additional","affiliation":[{"name":"Department of Computer Science, University of California at Los Angeles, Los Angeles, CA, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-6636-9738","authenticated-orcid":false,"given":"X. Sharon","family":"Hu","sequence":"additional","affiliation":[{"name":"Department of Electrical Engineering, University of Notre Dame, Notre Dame, IN, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Siddharth","family":"Joshi","sequence":"additional","affiliation":[{"name":"Department of Electrical Engineering, University of Notre Dame, Notre Dame, IN, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-5572-5194","authenticated-orcid":false,"given":"Subhasish","family":"Mitra","sequence":"additional","affiliation":[{"name":"Department of Electrical Engineering, Stanford University, Stanford, CA, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-9854-6540","authenticated-orcid":false,"given":"Wolfgang","family":"Porod","sequence":"additional","affiliation":[{"name":"Department of Electrical Engineering, University of Notre Dame, Notre Dame, IN, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-0096-1472","authenticated-orcid":false,"given":"H.-S. Philip","family":"Wong","sequence":"additional","affiliation":[{"name":"Department of Electrical Engineering, Stanford University, Stanford, CA, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref57","doi-asserted-by":"publisher","DOI":"10.1063\/5.0067927"},{"key":"ref56","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM19574.2021.9720647"},{"key":"ref59","year":"2023","journal-title":"Generative Pre-Trained Transformer 4 Wikipedia the Free Encyclopedia"},{"key":"ref58","doi-asserted-by":"publisher","DOI":"10.1038\/s41928-022-00774-2"},{"key":"ref53","first-page":"226","article-title":"14.3 A 43pJ\/cycle non-volatile microcontroller with 4.7 ?s shutdown\/wake-up integrating 2.3-bit\/cell resistive RAM and resilience techniques","author":"wu","year":"2019","journal-title":"IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers"},{"key":"ref52","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2018.8310399"},{"key":"ref55","doi-asserted-by":"publisher","DOI":"10.1038\/s41699-017-0036-0"},{"key":"ref54","doi-asserted-by":"publisher","DOI":"10.1038\/s41586-020-03063-0"},{"key":"ref51","doi-asserted-by":"publisher","DOI":"10.1109\/VLSICircuits18222.2020.9162811"},{"key":"ref50","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC19947.2020.9062979"},{"key":"ref46","doi-asserted-by":"publisher","DOI":"10.1038\/s41928-020-00515-3"},{"key":"ref45","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2011.2170635"},{"key":"ref48","doi-asserted-by":"publisher","DOI":"10.1038\/nature22994"},{"key":"ref47","doi-asserted-by":"publisher","DOI":"10.1038\/nature12502"},{"key":"ref42","doi-asserted-by":"publisher","DOI":"10.23919\/VLSICircuits52068.2021.9492347"},{"key":"ref41","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM13553.2020.9372019"},{"key":"ref44","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2019.2945533"},{"key":"ref43","doi-asserted-by":"publisher","DOI":"10.1038\/s41586-019-1493-8"},{"key":"ref49","doi-asserted-by":"publisher","DOI":"10.1038\/ncomms14948"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.5121\/ijdps.2012.3505"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/COMST.2019.2902862"},{"key":"ref9","first-page":"1","article-title":"A theoretical framework for symbolic quick error detection","author":"lonsing","year":"2020","journal-title":"Proc Formal Methods in Computer Aided Design (FMCAD)"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/REM.2018.8421793"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/MSPEC.2019.8913831"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/COMST.2016.2560343"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1007\/978-0-85729-085-4"},{"key":"ref100","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2018.2878159"},{"key":"ref101","first-page":"6050","article-title":"Adaptive droplet routing in digital microfluidic biochips using deep reinforcement learning","author":"liang","year":"2020","journal-title":"Proc Int Conf Mach Learn"},{"key":"ref40","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM13553.2020.9371974"},{"key":"ref35","first-page":"1","article-title":"Fully on-chip MAC at 14nm enabled by accurate row-wise programming of PCM-based weights and parallel vector-transport in duration-format","author":"narayanan","year":"2021","journal-title":"Proc Symp VLSI Technol"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.1109\/IMW48823.2020.9108150"},{"key":"ref37","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2018.2882603"},{"key":"ref36","doi-asserted-by":"crossref","first-page":"24","DOI":"10.1109\/MC.2015.376","article-title":"Energy-efficient abundant-data computing: The N3XT 1,000x","volume":"48","author":"aly","year":"2015","journal-title":"Computer"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1038\/s41928-020-0419-7"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2018.8351201"},{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1109\/VLSICircuits18222.2020.9163014"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1109\/VLSITechnology18217.2020.9265083"},{"key":"ref39","first-page":"112401","article-title":"Spin orbit torque domain wall-magnetic tunnel junction devices and circuits for in-memory and neuromorphic computing","volume":"118","author":"alamdar","year":"2021","journal-title":"Bull Amer Phys Soc"},{"key":"ref38","doi-asserted-by":"publisher","DOI":"10.1038\/s41586-019-1557-9"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2004.825870"},{"key":"ref23","first-page":"1","article-title":"Reducing time and effort in IC implementation: A roadmap of challenges and solutions","author":"kahng","year":"2018","journal-title":"Proc 55th Annu Design Autom Conf"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1145\/3489517.3530597"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1145\/3489517.3530409"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1145\/3431920.3439292"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1145\/3431920.3439289"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1145\/3380446.3430685"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2020.2981715"},{"key":"ref27","year":"2023","journal-title":"NAE Grand Challenges for Engineering"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM.2017.8268393"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1145\/3361682"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2018.2876372"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD45719.2019.8942060"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2018.022071131"},{"key":"ref97","doi-asserted-by":"publisher","DOI":"10.1109\/FMCAD.2016.7886649"},{"key":"ref96","doi-asserted-by":"publisher","DOI":"10.1109\/TIE.2018.2850031"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1145\/3282444"},{"key":"ref99","doi-asserted-by":"publisher","DOI":"10.3389\/fbioe.2020.01009"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/DAC18072.2020.9218715"},{"key":"ref98","doi-asserted-by":"publisher","DOI":"10.1038\/nature04342"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2020.3046524"},{"key":"ref16","article-title":"Pretraining graph neural networks for few-shot analog circuit modeling and design","author":"hakhamaneshi","year":"2022","journal-title":"IEEE Trans Comput -Aided Design Integr Circuits Syst"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1145\/3569052.3578929"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/MDAT.2020.3042177"},{"key":"ref93","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2017.2781198"},{"key":"ref92","doi-asserted-by":"publisher","DOI":"10.1038\/s41928-018-0092-2"},{"key":"ref95","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2018.2856932"},{"key":"ref94","doi-asserted-by":"publisher","DOI":"10.1145\/3400302.3415760"},{"key":"ref91","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2015.2460377"},{"key":"ref90","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2014.2359627"},{"key":"ref89","doi-asserted-by":"publisher","DOI":"10.1007\/978-1-4419-6193-8_3"},{"key":"ref86","doi-asserted-by":"publisher","DOI":"10.3389\/fnins.2022.795876"},{"key":"ref85","doi-asserted-by":"publisher","DOI":"10.1063\/1.5120412"},{"key":"ref88","author":"mead","year":"1980","journal-title":"Introduction to VLSI Systems"},{"key":"ref87","doi-asserted-by":"publisher","DOI":"10.1109\/TBCAS.2010.2048566"},{"key":"ref82","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-030-19311-9_19"},{"key":"ref81","doi-asserted-by":"publisher","DOI":"10.1109\/PS.2018.8751251"},{"key":"ref84","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2018.2878854"},{"key":"ref83","doi-asserted-by":"publisher","DOI":"10.1109\/JXCDC.2015.2504049"},{"key":"ref80","doi-asserted-by":"publisher","DOI":"10.1038\/s41928-020-0448-2"},{"key":"ref79","doi-asserted-by":"publisher","DOI":"10.1109\/5.58356"},{"key":"ref108","year":"2023","journal-title":"International Solid-State Circuits Conference (ISSCC)"},{"key":"ref78","doi-asserted-by":"publisher","DOI":"10.1016\/j.physleta.2017.02.042"},{"key":"ref109","year":"2023","journal-title":"ISPD"},{"key":"ref106","year":"0","journal-title":"NNCI"},{"key":"ref107","year":"2018","journal-title":"Basic research needs for microelectronics"},{"key":"ref75","doi-asserted-by":"publisher","DOI":"10.1162\/089976698300017052"},{"key":"ref104","doi-asserted-by":"publisher","DOI":"10.1109\/54.970421"},{"key":"ref74","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2010.2066530"},{"key":"ref105","year":"2023","journal-title":"MOSIS"},{"key":"ref77","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2020.2966925"},{"key":"ref102","doi-asserted-by":"publisher","DOI":"10.3389\/fphys.2012.00276"},{"key":"ref76","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2017.2754192"},{"key":"ref103","doi-asserted-by":"publisher","DOI":"10.1038\/s41587-019-0224-x"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/5254.867909"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1098\/rsta.2006.1917"},{"key":"ref71","doi-asserted-by":"publisher","DOI":"10.1109\/CICC.2017.7993650"},{"key":"ref111","year":"2023","journal-title":"ESWEEK"},{"key":"ref70","doi-asserted-by":"publisher","DOI":"10.1038\/s41586-022-04992-8"},{"key":"ref112","year":"2023","journal-title":"CAV"},{"key":"ref73","doi-asserted-by":"publisher","DOI":"10.1109\/JETCAS.2019.2933795"},{"key":"ref72","doi-asserted-by":"publisher","DOI":"10.3390\/jlpea11020014"},{"key":"ref110","year":"2023","journal-title":"IWLS"},{"key":"ref68","doi-asserted-by":"publisher","DOI":"10.1109\/MSSC.2019.2922889"},{"key":"ref67","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2018.2869867"},{"key":"ref117","year":"2023","journal-title":"A Report on Semiconductor Foundry Access by U S Academics"},{"key":"ref69","doi-asserted-by":"publisher","DOI":"10.1038\/s41928-020-00505-5"},{"key":"ref64","doi-asserted-by":"publisher","DOI":"10.23919\/DATE.2018.8342213"},{"key":"ref115","year":"2023","journal-title":"NSF Workshop on Micro\/Nano Circuits and Systems Design and Design Automation"},{"key":"ref63","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2012.2190369"},{"key":"ref116","year":"2023","journal-title":"A Report for NSF Workshop on Micro\/Nano Circuits and Systems Design and Design Automation"},{"key":"ref66","article-title":"A survey of model compression and acceleration for deep neural networks","author":"cheng","year":"2017","journal-title":"arXiv 1710 09282"},{"key":"ref113","year":"2023","journal-title":"ITC"},{"key":"ref65","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2020.2995809"},{"key":"ref114","year":"2023","journal-title":"DAC"},{"key":"ref60","first-page":"1877","article-title":"Language models are few-shot learners","volume":"33","author":"brown","year":"2020","journal-title":"Proc Adv Neural Inf Process Syst"},{"key":"ref62","doi-asserted-by":"publisher","DOI":"10.1145\/3140659.3080246"},{"key":"ref61","article-title":"Megatron-LM: Training multi-billion parameter language models using model parallelism","author":"shoeybi","year":"2019","journal-title":"arXiv 1909 08053"}],"container-title":["Proceedings of the IEEE"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/5\/10153467\/10153528.pdf?arnumber=10153528","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,2,8]],"date-time":"2024-02-08T18:44:26Z","timestamp":1707417866000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10153528\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2023,6]]},"references-count":117,"journal-issue":{"issue":"6"},"URL":"https:\/\/doi.org\/10.1109\/jproc.2023.3276941","relation":{},"ISSN":["0018-9219","1558-2256"],"issn-type":[{"value":"0018-9219","type":"print"},{"value":"1558-2256","type":"electronic"}],"subject":[],"published":{"date-parts":[[2023,6]]}}}