{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,12,26]],"date-time":"2025-12-26T07:12:37Z","timestamp":1766733157988,"version":"3.37.3"},"reference-count":31,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","license":[{"start":{"date-parts":[[2023,1,1]],"date-time":"2023-01-01T00:00:00Z","timestamp":1672531200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2023,1,1]],"date-time":"2023-01-01T00:00:00Z","timestamp":1672531200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2023,1,1]],"date-time":"2023-01-01T00:00:00Z","timestamp":1672531200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE J. Sel. Areas Inf. Theory"],"published-print":{"date-parts":[[2023]]},"DOI":"10.1109\/jsait.2023.3304235","type":"journal-article","created":{"date-parts":[[2023,8,11]],"date-time":"2023-08-11T17:33:21Z","timestamp":1691775201000},"page":"331-350","source":"Crossref","is-referenced-by-count":4,"title":["High-Speed LFSR Decoder Architectures for BCH and GII Codes"],"prefix":"10.1109","volume":"4","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-0211-8550","authenticated-orcid":false,"given":"Yingquan","family":"Wu","sequence":"first","affiliation":[{"name":"SambaNova Systems, Palo Alto, CA, USA"}]}],"member":"263","reference":[{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/VLSID.2006.163"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2016.2596777"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/TIT.2016.2633257"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/ISIT.2006.261714"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2004.826203"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1109\/TIT.1964.1053699"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/92.953498"},{"key":"ref10","first-page":"1","article-title":"A fresh look at the Berlekamp-Massey algorithm with application to low power BCH decoding","author":"ilani","year":"2018","journal-title":"Proc Non-Volatile Memories Workshop (NVMW)"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1049\/iet-cds:20060275"},{"journal-title":"Eur Telecommun Std Inst (ETSI)","article-title":"Digital video broadcasting (DVB); Second generation framing structure, channel coding and modulation systems for broadcasting, Interactive Services, news gathering and other broadband satellite applications (DVB-S2)","year":"2012","key":"ref1"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/TIT.2017.2789299"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/LCOMM.2021.3100106"},{"key":"ref19","first-page":"15","article-title":"Erasure coding in windows azure storage","author":"huang","year":"2012","journal-title":"Proc USENIX Annu Tech Conf"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/TIT.2022.3166210"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2020.3025847"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2019.2916698"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2021.3090325"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2020.2999823"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.14778\/2535573.2488339"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2019.2911730"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/TIT.2014.2321280"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/LCOMM.2021.3074461"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2022.3179944"},{"journal-title":"Binary BCH decoders","year":"2012","author":"wu","key":"ref29"},{"journal-title":"Reduced processing in high-speed Reed-Solomon decoding","year":"2010","author":"wu","key":"ref8"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/SIPS.2006.352599"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/TCOMM.2015.2445759"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2018.2877147"},{"key":"ref3","doi-asserted-by":"crossref","first-page":"1183","DOI":"10.1109\/TVLSI.2013.2264687","article-title":"High-throughput and low-complexity BCH decoding architecture for solid-state drives","volume":"22","author":"lee","year":"2014","journal-title":"IEEE Trans Very Large Scale Integr (VLSI) Syst"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/TIT.1971.1054655"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1017\/CBO9780511800467"}],"container-title":["IEEE Journal on Selected Areas in Information Theory"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8700143\/10153947\/10214504.pdf?arnumber=10214504","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,2,14]],"date-time":"2024-02-14T00:15:06Z","timestamp":1707869706000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10214504\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2023]]},"references-count":31,"URL":"https:\/\/doi.org\/10.1109\/jsait.2023.3304235","relation":{},"ISSN":["2641-8770"],"issn-type":[{"type":"electronic","value":"2641-8770"}],"subject":[],"published":{"date-parts":[[2023]]}}}