{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,4,11]],"date-time":"2025-04-11T04:02:05Z","timestamp":1744344125400,"version":"3.40.4"},"reference-count":15,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"5","license":[{"start":{"date-parts":[[2004,5,1]],"date-time":"2004-05-01T00:00:00Z","timestamp":1083369600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE J. Solid-State Circuits"],"published-print":{"date-parts":[[2004,5]]},"DOI":"10.1109\/jssc.2004.826341","type":"journal-article","created":{"date-parts":[[2004,5,6]],"date-time":"2004-05-06T17:08:33Z","timestamp":1083863313000},"page":"841-846","source":"Crossref","is-referenced-by-count":37,"title":["A low-voltage 40-GHz complementary VCO with 15% frequency tuning range in SOI CMOS technology"],"prefix":"10.1109","volume":"39","author":[{"family":"Neric Fong","sequence":"first","affiliation":[]},{"family":"Jonghae Kim","sequence":"additional","affiliation":[]},{"given":"J.-O.","family":"Plouchart","sequence":"additional","affiliation":[]},{"given":"N.","family":"Zamdmer","sequence":"additional","affiliation":[]},{"family":"Duixian Liu","sequence":"additional","affiliation":[]},{"given":"L.","family":"Wagner","sequence":"additional","affiliation":[]},{"given":"C.","family":"Plett","sequence":"additional","affiliation":[]},{"given":"G.","family":"Tarr","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/isscc.2001.912679"},{"key":"ref2","first-page":"372","article-title":"A 51 GHz VCO in 0.13 \u03bc m CMOS","volume-title":"IEEE Int. Solid-State Circuit Conf. Dig. Tech. Papers","author":"Tiebout"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/VLSIC.2002.1015080"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/VLSIT.2001.934959"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/4.760384"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/4.933456"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/SOI.1999.819828"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/RFIC.2003.1214016"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2003.814440"},{"volume-title":"IE3D\u2014Electromagnetic Simulation and Optimization Bay Technology","key":"ref10"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/PROC.1966.4682"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/VLSIC.2000.852862"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/RFIC.2000.854442"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2002.807404"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/MWSYM.2000.861012"}],"container-title":["IEEE Journal of Solid-State Circuits"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/4\/28770\/01291690.pdf?arnumber=1291690","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,4,10]],"date-time":"2025-04-10T05:05:37Z","timestamp":1744261537000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/1291690\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2004,5]]},"references-count":15,"journal-issue":{"issue":"5"},"URL":"https:\/\/doi.org\/10.1109\/jssc.2004.826341","relation":{},"ISSN":["0018-9200"],"issn-type":[{"type":"print","value":"0018-9200"}],"subject":[],"published":{"date-parts":[[2004,5]]}}}