{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,4,6]],"date-time":"2026-04-06T05:47:49Z","timestamp":1775454469541,"version":"3.50.1"},"reference-count":20,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"12","license":[{"start":{"date-parts":[[2009,12,1]],"date-time":"2009-12-01T00:00:00Z","timestamp":1259625600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE J. Solid-State Circuits"],"published-print":{"date-parts":[[2009,12]]},"DOI":"10.1109\/jssc.2009.2031021","type":"journal-article","created":{"date-parts":[[2009,12,18]],"date-time":"2009-12-18T18:14:49Z","timestamp":1261160089000},"page":"3547-3559","source":"Crossref","is-referenced-by-count":58,"title":["A 4-Channel 1.25\u201310.3 Gb\/s Backplane Transceiver Macro With 35 dB Equalizer and Sign-Based Zero-Forcing Adaptive Control"],"prefix":"10.1109","volume":"44","author":[{"given":"Yasuo","family":"Hidaka","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Weixin","family":"Gai","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Takeshi","family":"Horie","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jian Hong","family":"Jiang","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Yoichi","family":"Koyanagi","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Hideki","family":"Osone","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref10","first-page":"182","article-title":"a 10 gb\/s compact low-power serial i\/o with dfe-iir equalization in 65 nm cmos","author":"liu","year":"2009","journal-title":"IEEE Int Solid-State Circuits Conf Dig Tech Papers"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2005.1493868"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2005.856583"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2005.856584"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2006.884342"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2007.373377"},{"key":"ref16","first-page":"368","article-title":"a 78 mw 11.1 gb\/s 5-tap dfe receiver with digitally calibrated current-integrating summers in 65 nm cmos","author":"bulzacchelli","year":"2009","journal-title":"IEEE Int Solid-State Circuits Conf Dig Tech Papers"},{"key":"ref17","first-page":"436","article-title":"a 12.5 gb\/s serdes in 65 nm cmos using a baud-rate adc with digital receiver equalization and clock recovery","author":"harwood","year":"2007","journal-title":"IEEE Int Solid-State Circuits Conf Dig Tech Papers"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2007.373484"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2009.2031021"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/18.50391"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/49.87640"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2005.845562"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1007\/978-1-4757-2471-4"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2005.856574"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2006.880629"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/31.135746"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/PROC.1979.11409"},{"key":"ref9","first-page":"98","article-title":"an 8 gb\/s transceiver with 3x-oversampling 2-threshold eye-tracking cdr circuit for <formula formulatype=\"inline\"><tex notation=\"tex\">$-$<\/tex><\/formula>36.8 db-loss backplane","author":"fukuda","year":"2008","journal-title":"IEEE Int Solid-State Circuits Conf Dig Tech Papers"},{"key":"ref20","year":"2007","journal-title":"IEEE Standard for Information TechnologyTelecommunications and Information Exchange Between SystemsLocal and Metropolitan Area NetworksSpecific Requirements Part 3 CSMA\/CD Access Method and Physical Layer Specifications Amendment 4 Ethernet Operation Over Electrical Backplanes"}],"container-title":["IEEE Journal of Solid-State Circuits"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/4\/5342337\/05342371.pdf?arnumber=5342371","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,10,10]],"date-time":"2021-10-10T23:52:15Z","timestamp":1633909935000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/5342371\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2009,12]]},"references-count":20,"journal-issue":{"issue":"12"},"URL":"https:\/\/doi.org\/10.1109\/jssc.2009.2031021","relation":{},"ISSN":["0018-9200","1558-173X"],"issn-type":[{"value":"0018-9200","type":"print"},{"value":"1558-173X","type":"electronic"}],"subject":[],"published":{"date-parts":[[2009,12]]}}}