{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,9,29]],"date-time":"2025-09-29T11:56:41Z","timestamp":1759147001368},"reference-count":27,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"6","license":[{"start":{"date-parts":[[2010,6,1]],"date-time":"2010-06-01T00:00:00Z","timestamp":1275350400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE J. Solid-State Circuits"],"published-print":{"date-parts":[[2010,6]]},"DOI":"10.1109\/jssc.2010.2047473","type":"journal-article","created":{"date-parts":[[2010,6,15]],"date-time":"2010-06-15T18:13:07Z","timestamp":1276625587000},"page":"1172-1185","source":"Crossref","is-referenced-by-count":60,"title":["A 500 mW ADC-Based CMOS AFE With Digital Calibration for 10 Gb\/s Serial Links Over KR-Backplane and Multimode Fiber"],"prefix":"10.1109","volume":"45","author":[{"given":"Jun","family":"Cao","sequence":"first","affiliation":[]},{"given":"Bo","family":"Zhang","sequence":"additional","affiliation":[]},{"given":"Ullas","family":"Singh","sequence":"additional","affiliation":[]},{"given":"Delong","family":"Cui","sequence":"additional","affiliation":[]},{"given":"Anand","family":"Vasani","sequence":"additional","affiliation":[]},{"given":"Adesh","family":"Garg","sequence":"additional","affiliation":[]},{"given":"Wei","family":"Zhang","sequence":"additional","affiliation":[]},{"given":"Namik","family":"Kocaman","sequence":"additional","affiliation":[]},{"given":"Deyi","family":"Pi","sequence":"additional","affiliation":[]},{"given":"Bharath","family":"Raghavan","sequence":"additional","affiliation":[]},{"given":"Hui","family":"Pan","sequence":"additional","affiliation":[]},{"given":"Ichiro","family":"Fujimori","sequence":"additional","affiliation":[]},{"given":"Afshin","family":"Momtaz","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.1980.1051512"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/VLSIC.2008.4585935"},{"key":"ref12","first-page":"318","article-title":"a 20 gs\/s 8 b adc with a 1 mb memory in 0.18<formula formulatype=\"inline\"> <tex notation=\"tex\">$\\mu{\\hbox {m}}$<\/tex><\/formula> cmos","author":"poulton","year":"2003","journal-title":"IEEE ISSCC Dig Tech Papers"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2008.4523298"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/19.6060"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/81.915383"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/TIM.2004.834046"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/4.735530"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2008.917427"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2006.884331"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2007.373481"},{"key":"ref27","year":"2009","journal-title":"SFF-8431 Specifications for Enhanced Small Form Factor Pluggable Module SFP+ Revision 4 0"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2006.883317"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/4.987083"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2008.2006232"},{"key":"ref8","author":"lee","year":"1998","journal-title":"The Design of CMOS Radio-Frequency Integrated Circuits"},{"key":"ref7","first-page":"370","article-title":"a 500 mw digitally calibrated afe in 65 nm cmos for 10 gb\/s serial links over backplane and multimode fiber","author":"cao","year":"2009","journal-title":"IEEE ISSCC Dig Tech Papers"},{"key":"ref2","year":"2006","journal-title":"Physical Layer and Management Parameters for 10 Gb\/s Operation Type 10 GBASE-LRM"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2002.804336"},{"key":"ref1","year":"2007","journal-title":"Ethernet Operation Over Electrical Backplanes"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/4.173122"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2005.856584"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/4.127344"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/CICC.1998.695039"},{"key":"ref23","first-page":"80","article-title":"a 10-gb\/s 5-tap dfe\/4-tap ffe transceiver in 90-nm cmos technology","author":"meghelli","year":"2006","journal-title":"IEEE ISSCC Dig Tech Papers"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2009.2020657"},{"key":"ref25","author":"lee","year":"1998","journal-title":"The Design of CMOS Radio-Frequency Integrated Circuits"}],"container-title":["IEEE Journal of Solid-State Circuits"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/4\/5482512\/05482515.pdf?arnumber=5482515","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,10,11]],"date-time":"2021-10-11T00:44:10Z","timestamp":1633913050000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/5482515\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2010,6]]},"references-count":27,"journal-issue":{"issue":"6"},"URL":"https:\/\/doi.org\/10.1109\/jssc.2010.2047473","relation":{},"ISSN":["0018-9200","1558-173X"],"issn-type":[{"value":"0018-9200","type":"print"},{"value":"1558-173X","type":"electronic"}],"subject":[],"published":{"date-parts":[[2010,6]]}}}