{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,1,22]],"date-time":"2026-01-22T21:21:17Z","timestamp":1769116877893,"version":"3.49.0"},"reference-count":25,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"7","license":[{"start":{"date-parts":[[2010,7,1]],"date-time":"2010-07-01T00:00:00Z","timestamp":1277942400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE J. Solid-State Circuits"],"published-print":{"date-parts":[[2010,7]]},"DOI":"10.1109\/jssc.2010.2048085","type":"journal-article","created":{"date-parts":[[2010,7,6]],"date-time":"2010-07-06T18:02:21Z","timestamp":1278439341000},"page":"1399-1409","source":"Crossref","is-referenced-by-count":20,"title":["A 118.4 GB\/s Multi-Casting Network-on-Chip With Hierarchical Star-Ring Combined Topology for Real-Time Object Recognition"],"prefix":"10.1109","volume":"45","author":[{"given":"Joo-Young","family":"Kim","sequence":"first","affiliation":[]},{"given":"Junyoung","family":"Park","sequence":"additional","affiliation":[]},{"given":"Seungjin","family":"Lee","sequence":"additional","affiliation":[]},{"given":"Minsu","family":"Kim","sequence":"additional","affiliation":[]},{"given":"Jinwook","family":"Oh","sequence":"additional","affiliation":[]},{"given":"Hoi-Jun","family":"Yoo","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1155\/ASP.2005.993"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-540-79547-6_18"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/CICC.2007.4405769"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2008.2007157"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2009.2031768"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/ASSCC.2007.4425679"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/ASSCC.2008.4708760"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2009.102"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1145\/984458.984486"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2005.863753"},{"key":"ref4","first-page":"152","article-title":"a 51 mw 1.6 ghz on-chip network for low-power heterogeneous soc platform","author":"lee","year":"2004","journal-title":"IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers"},{"key":"ref3","first-page":"468","article-title":"an 800 mhz star-connected on-chip network for application to systems on a chip","author":"lee","year":"2003","journal-title":"IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers"},{"key":"ref6","first-page":"88","article-title":"tile64tm processor: a 64-core soc with mesh interconnect","author":"bell","year":"2008","journal-title":"IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers"},{"key":"ref5","first-page":"98","article-title":"an 80-tile 1.28tflops network-on-chip in 65 nm cmos","author":"vangal","year":"2007","journal-title":"IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers"},{"key":"ref8","author":"forsyth","year":"2002","journal-title":"Computer Vision A Modern Approach"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2007.4378779"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1145\/378239.379048"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1023\/B:VISI.0000029664.99615.94"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/2.976921"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1007\/b137175"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1201\/9781420051735"},{"key":"ref21","author":"peterson","year":"2007","journal-title":"Computer Networks A Systems Approach"},{"key":"ref24","doi-asserted-by":"crossref","first-page":"146","DOI":"10.1007\/3-540-58429-3_34","article-title":"multi-address encoding for multicast","author":"chiang","year":"1994","journal-title":"Proc 1st Int Workshop on Parallel Computer Routing and Communication PCRCW'94"},{"key":"ref23","article-title":"Deadlock-free multi-head wormhole routing","author":"chiang","year":"1995","journal-title":"Proc First High Performance ComputingAsia"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/ASYNC.1994.656289"}],"container-title":["IEEE Journal of Solid-State Circuits"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/4\/5492307\/05492313.pdf?arnumber=5492313","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,10,11]],"date-time":"2021-10-11T00:44:07Z","timestamp":1633913047000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/5492313\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2010,7]]},"references-count":25,"journal-issue":{"issue":"7"},"URL":"https:\/\/doi.org\/10.1109\/jssc.2010.2048085","relation":{},"ISSN":["0018-9200","1558-173X"],"issn-type":[{"value":"0018-9200","type":"print"},{"value":"1558-173X","type":"electronic"}],"subject":[],"published":{"date-parts":[[2010,7]]}}}