{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,9,29]],"date-time":"2025-09-29T11:47:32Z","timestamp":1759146452396},"reference-count":35,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"9","license":[{"start":{"date-parts":[[2010,9,1]],"date-time":"2010-09-01T00:00:00Z","timestamp":1283299200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE J. Solid-State Circuits"],"published-print":{"date-parts":[[2010,9]]},"DOI":"10.1109\/jssc.2010.2050942","type":"journal-article","created":{"date-parts":[[2010,8,24]],"date-time":"2010-08-24T18:54:22Z","timestamp":1282676062000},"page":"1795-1808","source":"Crossref","is-referenced-by-count":46,"title":["A 25 MHz Bandwidth 5th-Order Continuous-Time Low-Pass Sigma-Delta Modulator With 67.7 dB SNDR Using Time-Domain Quantization and Feedback"],"prefix":"10.1109","volume":"45","author":[{"given":"Cho-Ying","family":"Lu","sequence":"first","affiliation":[]},{"given":"Marvin","family":"Onabajo","sequence":"additional","affiliation":[]},{"given":"Venkata","family":"Gadde","sequence":"additional","affiliation":[]},{"given":"Yung-Chung","family":"Lo","sequence":"additional","affiliation":[]},{"given":"Hsien-Pu","family":"Chen","sequence":"additional","affiliation":[]},{"given":"Vijayaramalingam","family":"Periasamy","sequence":"additional","affiliation":[]},{"given":"Jose","family":"Silva-Martinez","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2002.1010664"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1109\/4.173122"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1109\/4.127344"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1109\/4.68134"},{"key":"ref35","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2003.811975"},{"key":"ref34","first-page":"1029","article-title":"excess loop delay effects in continuous-time quadrature bandpass sigma-delta modulators","volume":"1","author":"frank","year":"2003","journal-title":"Proc IEEE Int Symp Circuits and Systems (ISCAS)"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/ECCTD.2005.1522945"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.1995.521439"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/ICECS.2009.5410950"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2008.922178"},{"key":"ref14","first-page":"170","article-title":"a 0.13 <ref_formula><tex notation=\"tex\">$\\mu{\\hbox {m}}$<\/tex><\/ref_formula> cmos 78 db sndr 87 mw 20 mhz bw ct <ref_formula> <tex notation=\"tex\">$\\delta\\sigma$<\/tex><\/ref_formula> adc with vco-based integrator and quantizer","author":"park","year":"2009","journal-title":"IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers"},{"key":"ref15","first-page":"259","article-title":"a 1.8 v, sub-mw, over 100% locking range, divide-by-3 and 7 complementary-injection-locked 4 ghz frequency divider","author":"lo","year":"2009","journal-title":"Proc IEEE Custom Integrated Circuits Conf (CICC)"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/4.18582"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2009.2012449"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2006.884231"},{"key":"ref19","first-page":"242","article-title":"a 150 ms\/s 133 <ref_formula> <tex notation=\"tex\">$\\mu{\\hbox {w}}$<\/tex><\/ref_formula> 7 b adc in 90 nm digital cmos using a comparator-based asynchronous binary-search sub-adc","author":"van der plas","year":"2008","journal-title":"IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1049\/el:19990028"},{"key":"ref4","first-page":"238","article-title":"a 56 mw ct quadrature cascaded <ref_formula> <tex notation=\"tex\">$\\sigma\\delta$<\/tex><\/ref_formula> modulator with 77 db dr in a near zero-if 20 mhz band","author":"breems","year":"2007","journal-title":"IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/4.839926"},{"key":"ref3","first-page":"174","article-title":"a 20 mhz bw 68 db dr ct <ref_formula><tex notation=\"tex\">$\\delta\\sigma$<\/tex><\/ref_formula> adc based on a multi-bit time-domain quantizer and feedback element","author":"dhanasekaran","year":"2009","journal-title":"IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2006.884332"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1049\/el:19950207"},{"key":"ref5","first-page":"496","article-title":"a 28 mw spectrum-sensing reconfigurable 20 mhz 72 db-snr 70 db-sndr dt <ref_formula><tex notation=\"tex\">$\\delta\\sigma$<\/tex> <\/ref_formula> adc for 802.11n\/wimax receivers","author":"malla","year":"2008","journal-title":"IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2010.2042244"},{"key":"ref7","doi-asserted-by":"crossref","first-page":"1401","DOI":"10.1109\/JSSC.2009.2015852","article-title":"A 1 GHz bandwidth low-pass <ref_formula> <tex Notation=\"TeX\">$\\Delta\\Sigma$<\/tex><\/ref_formula> ADC with 20&#x2013;50 GHz adjustable sampling rate","volume":"44","author":"hart","year":"2009","journal-title":"IEEE J Solid-State Circuits"},{"key":"ref2","first-page":"498","article-title":"a 100 mw 10 mhz-bw ct <ref_formula> <tex notation=\"tex\">$\\delta\\sigma$<\/tex><\/ref_formula> modulator with 87 db dr and 91 dbc imd","author":"yang","year":"2008","journal-title":"IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/4.735527"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2008.917500"},{"key":"ref20","first-page":"246","article-title":"A 65 fJ\/conversion-step 0-to-50 MS\/s 0-to-0.7 mW 9 b charge-sharing SAR ADC in 90 nm digital CMOS","author":"craninckx","year":"2007","journal-title":"IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/ICASSP.2004.1326326"},{"key":"ref21","author":"salo","year":"2003","journal-title":"Bandpass delta-sigma modulators for radio receivers"},{"key":"ref24","author":"cherry","year":"2000","journal-title":"Continuous-Time Delta-Sigma Modulators for High-Speed A\/D Conversion"},{"key":"ref23","author":"holmes","year":"2003","journal-title":"Pulse Width Modulation for Power Converters Principles and Practice"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2002.807410"},{"key":"ref25","author":"lu","year":"2010","journal-title":"Calibrated Continuous-Time Sigma-Delta Modulators"}],"container-title":["IEEE Journal of Solid-State Circuits"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/4\/5556407\/05556409.pdf?arnumber=5556409","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,12,23]],"date-time":"2021-12-23T03:07:00Z","timestamp":1640228820000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/5556409\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2010,9]]},"references-count":35,"journal-issue":{"issue":"9"},"URL":"https:\/\/doi.org\/10.1109\/jssc.2010.2050942","relation":{},"ISSN":["0018-9200","1558-173X"],"issn-type":[{"value":"0018-9200","type":"print"},{"value":"1558-173X","type":"electronic"}],"subject":[],"published":{"date-parts":[[2010,9]]}}}