{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,11,18]],"date-time":"2025-11-18T09:14:13Z","timestamp":1763457253278},"reference-count":26,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"1","license":[{"start":{"date-parts":[[2011,1,1]],"date-time":"2011-01-01T00:00:00Z","timestamp":1293840000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE J. Solid-State Circuits"],"published-print":{"date-parts":[[2011,1]]},"DOI":"10.1109\/jssc.2010.2079410","type":"journal-article","created":{"date-parts":[[2010,11,23]],"date-time":"2010-11-23T21:01:53Z","timestamp":1290546113000},"page":"18-31","source":"Crossref","is-referenced-by-count":125,"title":["A Power-Efficient 32 bit ARM Processor Using Timing-Error Detection and Correction for Transient-Error Tolerance and Adaptation to PVT Variation"],"prefix":"10.1109","volume":"46","author":[{"given":"David","family":"Bull","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Shidhartha","family":"Das","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Karthik","family":"Shivashankar","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Ganesh S.","family":"Dasika","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Krisztian","family":"Flautner","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"David","family":"Blaauw","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2007.373409"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2004.838021"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2002.803941"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM.2003.1269294"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/16.848285"},{"key":"ref15","year":"0","journal-title":"UMC"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2005.859879"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2005.859902"},{"key":"ref18","first-page":"297","article-title":"comparison of split- versus connected-core supplies in the power6tm microprocessor","author":"james","year":"2007","journal-title":"IEEE ISSCC Dig Tech Papers"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2002.803957"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2008.2007145"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2008.4523226"},{"key":"ref6","first-page":"282","article-title":"a 45 nm resilient and adaptive microprocessor core for dynamic variation tolerance","author":"tschanz","year":"2010","journal-title":"IEEE ISSCC Dig Tech Papers"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2008.2007148"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2010.5433919"},{"key":"ref7","first-page":"112","article-title":"tunable replica circuits and adaptive voltage-frequency techniques for dynamic voltage, temperature, and aging variation tolerance","author":"tschanz","year":"2009","journal-title":"2009 Symposium on VLSI Circuits VLSIC"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2003.1253179"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2006.870912"},{"key":"ref9","article-title":"a distributed critical path timing monitor for a 65 nm high-performance microprocessor","author":"drake","year":"2007","journal-title":"IEEE ISSCC Dig Tech Papers"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2002.803949"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2008.4523155"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2003.810053"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2008.2003029"},{"key":"ref23","doi-asserted-by":"crossref","first-page":"116","DOI":"10.1145\/871506.871537","article-title":"optimal body bias selection for leakage improvement and process compensation over different technology generations","author":"neau","year":"2003","journal-title":"Proc Int Symp Low-Power Electron Des (ISLPED)"},{"key":"ref26","year":"0","journal-title":"AMBA APB Bus Specification Reference Manual"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2007.902200"}],"container-title":["IEEE Journal of Solid-State Circuits"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/4\/5673672\/05640683.pdf?arnumber=5640683","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,10,11]],"date-time":"2021-10-11T00:46:00Z","timestamp":1633913160000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/5640683\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2011,1]]},"references-count":26,"journal-issue":{"issue":"1"},"URL":"https:\/\/doi.org\/10.1109\/jssc.2010.2079410","relation":{},"ISSN":["0018-9200","1558-173X"],"issn-type":[{"value":"0018-9200","type":"print"},{"value":"1558-173X","type":"electronic"}],"subject":[],"published":{"date-parts":[[2011,1]]}}}