{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,2,21]],"date-time":"2026-02-21T18:48:32Z","timestamp":1771699712739,"version":"3.50.1"},"reference-count":23,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"7","license":[{"start":{"date-parts":[[2011,7,1]],"date-time":"2011-07-01T00:00:00Z","timestamp":1309478400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE J. Solid-State Circuits"],"published-print":{"date-parts":[[2011,7]]},"DOI":"10.1109\/jssc.2011.2143950","type":"journal-article","created":{"date-parts":[[2011,5,27]],"date-time":"2011-05-27T15:53:33Z","timestamp":1306511613000},"page":"1606-1617","source":"Crossref","is-referenced-by-count":76,"title":["A Low Phase Noise, Wideband and Compact CMOS PLL for Use in a Heterodyne 802.15.3c Transceiver"],"prefix":"10.1109","volume":"46","author":[{"given":"David","family":"Murphy","sequence":"first","affiliation":[]},{"given":"Qun Jane","family":"Gu","sequence":"additional","affiliation":[]},{"given":"Yi-Cheng","family":"Wu","sequence":"additional","affiliation":[]},{"given":"Heng-Yu","family":"Jian","sequence":"additional","affiliation":[]},{"given":"Zhiwei","family":"Xu","sequence":"additional","affiliation":[]},{"given":"Adrian","family":"Tang","sequence":"additional","affiliation":[]},{"given":"Frank","family":"Wang","sequence":"additional","affiliation":[]},{"given":"Mau-Chung Frank","family":"Chang","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/CICC.1998.695039"},{"key":"ref11","first-page":"219","article-title":"Embedded DiCAD linear phase shifter for 57&#x2013;65 GHz reconfigurable direct frequency modulation in 90 nm CMOS","author":"larocca","year":"2009","journal-title":"Proc RFIC Conf 2009"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/MWSYM.2009.5165789"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2007.903050"},{"key":"ref14","doi-asserted-by":"crossref","DOI":"10.1007\/978-0-387-76561-7","author":"niknejad","year":"2008","journal-title":"mm-Wave Silicon Technology 60 GHz and Beyond"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2009.2030110"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2002.801415"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/RFIC.2010.5477323"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2009.2032584"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2004.829937"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1587\/transele.E92.C.785"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/ESSCIRC.2010.5619880"},{"key":"ref6","first-page":"252","article-title":"A 17.5-to-20.94 GHz and 35-to-41.88 GHz PLL in 65 nm CMOS for wireless HD applications","author":"richard","year":"2010","journal-title":"IEEE ISSCC Dig 2010"},{"key":"ref5","first-page":"494","article-title":"A 57-to-66 GHz quadrature PLL in 45 nm digital CMOS","author":"scheir","year":"2009","journal-title":"IEEE ISSCC Dig 2009"},{"key":"ref8","first-page":"337","article-title":"A 1.5 V, 1.7 mA 700 MHz CMOS LC oscillator with no upconverted flicker noise","author":"hoshino","year":"2001","journal-title":"Proc ESSCIRC 2001"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/4.972142"},{"key":"ref2","year":"2009","journal-title":"IEEE Standard for Information TechnologyTelecommunications and Information Exchange Between SystemsLocal and Metropolitan Area NetworksSpecific Requirements Part 15 3 Wireless Medium Access Control (MAC) and Physical Layer (PHY) Specifications for High Rate Wireless Personal Area Networks (WPANs) Amendment 2 Millimeter-Wave-Based Alternative Physical Layer Extension"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/SPEC.2008.4445795"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2003.811968"},{"key":"ref20","first-page":"88","article-title":"Low-power 48-GHz CMOS VCO and 60-GHz CMOS LNA for 60-GHz dual-conversion receiver","author":"lin","year":"2009","journal-title":"Proc VLSI-DAT 2009"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2009.2016701"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2009.2020245"},{"key":"ref23","first-page":"307","article-title":"A digitally calibrated 64.3&#x2013;66.2 GHz phase-locked loop","author":"tsai","year":"2008","journal-title":"Proc RFIC Conf 2008"}],"container-title":["IEEE Journal of Solid-State Circuits"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/4\/5928962\/05776718.pdf?arnumber=5776718","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,12]],"date-time":"2022-01-12T16:53:56Z","timestamp":1642006436000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/5776718\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2011,7]]},"references-count":23,"journal-issue":{"issue":"7"},"URL":"https:\/\/doi.org\/10.1109\/jssc.2011.2143950","relation":{},"ISSN":["0018-9200","1558-173X"],"issn-type":[{"value":"0018-9200","type":"print"},{"value":"1558-173X","type":"electronic"}],"subject":[],"published":{"date-parts":[[2011,7]]}}}