{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,7,23]],"date-time":"2024-07-23T07:53:47Z","timestamp":1721721227113},"reference-count":11,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"1","license":[{"start":{"date-parts":[[2012,1,1]],"date-time":"2012-01-01T00:00:00Z","timestamp":1325376000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE J. Solid-State Circuits"],"published-print":{"date-parts":[[2012,1]]},"DOI":"10.1109\/jssc.2011.2164711","type":"journal-article","created":{"date-parts":[[2011,11,8]],"date-time":"2011-11-08T21:36:35Z","timestamp":1320788195000},"page":"75-84","source":"Crossref","is-referenced-by-count":9,"title":["A 151-mm$^{2}$ 64-Gb 2 Bit\/Cell NAND Flash Memory in 24-nm CMOS Technology"],"prefix":"10.1109","volume":"47","author":[{"given":"Koichi","family":"Fukuda","sequence":"first","affiliation":[]},{"given":"Yoshihisa","family":"Watanabe","sequence":"additional","affiliation":[]},{"given":"Eiichi","family":"Makino","sequence":"additional","affiliation":[]},{"given":"Koichi","family":"Kawakami","sequence":"additional","affiliation":[]},{"given":"Jumpei","family":"Sato","sequence":"additional","affiliation":[]},{"given":"Teruo","family":"Takagiwa","sequence":"additional","affiliation":[]},{"given":"Naoaki","family":"Kanagawa","sequence":"additional","affiliation":[]},{"given":"Hitoshi","family":"Shiga","sequence":"additional","affiliation":[]},{"given":"Naoya","family":"Tokiwa","sequence":"additional","affiliation":[]},{"given":"Yoshihiko","family":"Shindo","sequence":"additional","affiliation":[]},{"given":"Takeshi","family":"Ogawa","sequence":"additional","affiliation":[]},{"given":"Toshiaki","family":"Edahiro","sequence":"additional","affiliation":[]},{"given":"Makoto","family":"Iwai","sequence":"additional","affiliation":[]},{"given":"Osamu","family":"Nagao","sequence":"additional","affiliation":[]},{"given":"Junji","family":"Musha","sequence":"additional","affiliation":[]},{"given":"Takatoshi","family":"Minamoto","sequence":"additional","affiliation":[]},{"given":"Yuka","family":"Furuta","sequence":"additional","affiliation":[]},{"given":"Kosuke","family":"Yanagidaira","sequence":"additional","affiliation":[]},{"given":"Yuya","family":"Suzuki","sequence":"additional","affiliation":[]},{"given":"Dai","family":"Nakamura","sequence":"additional","affiliation":[]},{"given":"Yoshikazu","family":"Hosomura","sequence":"additional","affiliation":[]},{"given":"Rieko","family":"Tanaka","sequence":"additional","affiliation":[]},{"given":"Hiromitsu","family":"Komai","sequence":"additional","affiliation":[]},{"given":"Mai","family":"Muramoto","sequence":"additional","affiliation":[]},{"given":"Go","family":"Shikata","sequence":"additional","affiliation":[]},{"given":"Ayako","family":"Yuminaka","sequence":"additional","affiliation":[]},{"given":"Kiyofumi","family":"Sakurai","sequence":"additional","affiliation":[]},{"given":"Manabu","family":"Sakai","sequence":"additional","affiliation":[]},{"given":"Hong","family":"Ding","sequence":"additional","affiliation":[]},{"given":"Mitsuyuki","family":"Watanabe","sequence":"additional","affiliation":[]},{"given":"Yosuke","family":"Kato","sequence":"additional","affiliation":[]},{"given":"Toru","family":"Miwa","sequence":"additional","affiliation":[]},{"given":"Alexander","family":"Mak","sequence":"additional","affiliation":[]},{"given":"Masaru","family":"Nakamichi","sequence":"additional","affiliation":[]},{"given":"Gertjan","family":"Hemink","sequence":"additional","affiliation":[]},{"given":"Dana","family":"Lee","sequence":"additional","affiliation":[]},{"given":"Masaaki","family":"Higashitani","sequence":"additional","affiliation":[]},{"given":"Brian","family":"Murphy","sequence":"additional","affiliation":[]},{"given":"Bo","family":"Lei","sequence":"additional","affiliation":[]},{"given":"Yasuhiko","family":"Matsunaga","sequence":"additional","affiliation":[]},{"given":"Kiyomi","family":"Naruke","sequence":"additional","affiliation":[]},{"given":"Takahiko","family":"Hara","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref4","first-page":"198","article-title":"A 151 <ref_formula> <tex Notation=\"TeX\">${\\hbox{mm}}^{2}$<\/tex><\/ref_formula> 64 Gb MLC NAND flash memory in 24 nm CMOS technology","author":"fukuda","year":"2011","journal-title":"IEEE ISSCC Dig Tech Papers"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2006.888299"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/4.475701"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2010.5433949"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.1996.542301"},{"key":"ref5","first-page":"442","article-title":"A 159 <ref_formula> <tex Notation=\"TeX\">${\\hbox{mm}}^{2}$<\/tex><\/ref_formula> 32 nm MLC NAND-flash memory with 200 MB\/s asynchronous DDR interface","author":"hyunggon","year":"2010","journal-title":"IEEE ISSCC Dig Tech Papers"},{"key":"ref8","first-page":"420","article-title":"A 34 MB\/s-program-throughput 16 Gb MLC NAND with all-bitline architecture in 56 nm","author":"cernea","year":"2008","journal-title":"IEEE ISSCC Dig Tech Papers"},{"key":"ref7","first-page":"430","article-title":"A 120 <ref_formula> <tex Notation=\"TeX\">${\\hbox{mm}}^{2}$<\/tex><\/ref_formula> 16 Gb 4-MLC NAND flash memory with 43 nm CMOS technology","author":"kanda","year":"2008","journal-title":"IEEE ISSCC Dig Tech Papers"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/4.328638"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2005.859027"},{"key":"ref1","doi-asserted-by":"crossref","first-page":"552","DOI":"10.1109\/IEDM.1987.191485","article-title":"new ultra high density eprom and flash eeprom with nand structure cell","author":"masuoka","year":"1987","journal-title":"1987 International Electron Devices Meeting"}],"container-title":["IEEE Journal of Solid-State Circuits"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/4\/6109882\/06072275.pdf?arnumber=6072275","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,10,10]],"date-time":"2021-10-10T23:47:06Z","timestamp":1633909626000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6072275\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2012,1]]},"references-count":11,"journal-issue":{"issue":"1"},"URL":"https:\/\/doi.org\/10.1109\/jssc.2011.2164711","relation":{},"ISSN":["0018-9200","1558-173X"],"issn-type":[{"value":"0018-9200","type":"print"},{"value":"1558-173X","type":"electronic"}],"subject":[],"published":{"date-parts":[[2012,1]]}}}