{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,2,11]],"date-time":"2026-02-11T18:13:15Z","timestamp":1770833595990,"version":"3.50.1"},"reference-count":9,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"12","license":[{"start":{"date-parts":[[2011,12,1]],"date-time":"2011-12-01T00:00:00Z","timestamp":1322697600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE J. Solid-State Circuits"],"published-print":{"date-parts":[[2011,12]]},"DOI":"10.1109\/jssc.2011.2168871","type":"journal-article","created":{"date-parts":[[2011,11,23]],"date-time":"2011-11-23T21:48:49Z","timestamp":1322084929000},"page":"3126-3139","source":"Crossref","is-referenced-by-count":32,"title":["A 1.0625 $\\sim$ 14.025 Gb\/s Multi-Media Transceiver With Full-Rate Source-Series-Terminated Transmit Driver and Floating-Tap Decision-Feedback Equalizer in 40 nm CMOS"],"prefix":"10.1109","volume":"46","author":[{"given":"Freeman","family":"Zhong","sequence":"first","affiliation":[]},{"given":"Shaolei","family":"Quan","sequence":"additional","affiliation":[]},{"given":"Wing","family":"Liu","sequence":"additional","affiliation":[]},{"given":"Pervez","family":"Aziz","sequence":"additional","affiliation":[]},{"given":"Tai","family":"Jing","sequence":"additional","affiliation":[]},{"given":"Jen","family":"Dong","sequence":"additional","affiliation":[]},{"given":"Chintan","family":"Desai","sequence":"additional","affiliation":[]},{"given":"Hairong","family":"Gao","sequence":"additional","affiliation":[]},{"given":"Monica","family":"Garcia","sequence":"additional","affiliation":[]},{"given":"Gary","family":"Hom","sequence":"additional","affiliation":[]},{"given":"Tony","family":"Huynh","sequence":"additional","affiliation":[]},{"given":"Hiroshi","family":"Kimura","sequence":"additional","affiliation":[]},{"given":"Ruchi","family":"Kothari","sequence":"additional","affiliation":[]},{"given":"Lijun","family":"Li","sequence":"additional","affiliation":[]},{"given":"Cathy","family":"Liu","sequence":"additional","affiliation":[]},{"given":"Scott","family":"Lowrie","sequence":"additional","affiliation":[]},{"given":"Kathy","family":"Ling","sequence":"additional","affiliation":[]},{"given":"Amaresh","family":"Malipatil","sequence":"additional","affiliation":[]},{"given":"Ram","family":"Narayan","sequence":"additional","affiliation":[]},{"given":"Tom","family":"Prokop","sequence":"additional","affiliation":[]},{"given":"Chai","family":"Palusa","sequence":"additional","affiliation":[]},{"given":"Anil","family":"Rajashekara","sequence":"additional","affiliation":[]},{"given":"Ashutosh","family":"Sinha","sequence":"additional","affiliation":[]},{"given":"Charlie","family":"Zhong","sequence":"additional","affiliation":[]},{"given":"Eric","family":"Zhang","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2005.856583"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2007.373377"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1049\/el:19750415"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2011.5937830"},{"key":"ref8","first-page":"162","article-title":"A 16 Gb\/s 1st-tap FFE and 3-tap DFE 90 nm CMOS","author":"sugita","year":"2010","journal-title":"IEEE ISSCC Dig Tech Papers"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/VLSISOC.2007.4402477"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2009.2031021"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2008.2006230"},{"key":"ref1","doi-asserted-by":"crossref","first-page":"2885","DOI":"10.1109\/JSSC.2006.884342","article-title":"A 10-Gb\/s 5-tap DFE\/4-tap FFE transceiver 90-nm CMOS technology","volume":"41","author":"bulzacchelli","year":"2006","journal-title":"IEEE J Solid-State Circuits"}],"container-title":["IEEE Journal of Solid-State Circuits"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/4\/6079316\/06074962.pdf?arnumber=6074962","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,10,10]],"date-time":"2021-10-10T23:47:36Z","timestamp":1633909656000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6074962\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2011,12]]},"references-count":9,"journal-issue":{"issue":"12"},"URL":"https:\/\/doi.org\/10.1109\/jssc.2011.2168871","relation":{},"ISSN":["0018-9200"],"issn-type":[{"value":"0018-9200","type":"print"}],"subject":[],"published":{"date-parts":[[2011,12]]}}}