{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,5]],"date-time":"2026-03-05T15:37:12Z","timestamp":1772725032379,"version":"3.50.1"},"reference-count":8,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"6","license":[{"start":{"date-parts":[[2012,6,1]],"date-time":"2012-06-01T00:00:00Z","timestamp":1338508800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE J. Solid-State Circuits"],"published-print":{"date-parts":[[2012,6]]},"DOI":"10.1109\/jssc.2012.2190187","type":"journal-article","created":{"date-parts":[[2012,5,24]],"date-time":"2012-05-24T18:44:42Z","timestamp":1337885082000},"page":"1460-1468","source":"Crossref","is-referenced-by-count":8,"title":["NAND Controller System With Channel Number Detection and Feedback for Power-Efficient High-Speed 3D-SSD"],"prefix":"10.1109","volume":"47","author":[{"given":"Teruyoshi","family":"Hatanaka","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Ken","family":"Takeuchi","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1007\/978-90-481-9431-5"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2011.2131810"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1145\/1594233.1594253"},{"key":"ref5","first-page":"233","article-title":"A 60% higher write speed, 4.2 Gbps, 24-channel 3D-solid state drive (SSD with NAND flash channel number detector and intelligent program-voltage booster","author":"hatanaka","year":"2010","journal-title":"Proc IEEE Symp VLSI Circuits"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2006.880609"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/4.792620"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/.2006.1629477"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2009.2014027"}],"container-title":["IEEE Journal of Solid-State Circuits"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/4\/6203507\/06189061.pdf?arnumber=6189061","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,10,10]],"date-time":"2021-10-10T23:52:05Z","timestamp":1633909925000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6189061\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2012,6]]},"references-count":8,"journal-issue":{"issue":"6"},"URL":"https:\/\/doi.org\/10.1109\/jssc.2012.2190187","relation":{},"ISSN":["0018-9200","1558-173X"],"issn-type":[{"value":"0018-9200","type":"print"},{"value":"1558-173X","type":"electronic"}],"subject":[],"published":{"date-parts":[[2012,6]]}}}