{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,5]],"date-time":"2026-03-05T15:44:42Z","timestamp":1772725482674,"version":"3.50.1"},"reference-count":6,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"1","license":[{"start":{"date-parts":[[2013,1,1]],"date-time":"2013-01-01T00:00:00Z","timestamp":1356998400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE J. Solid-State Circuits"],"published-print":{"date-parts":[[2013,1]]},"DOI":"10.1109\/jssc.2012.2213512","type":"journal-article","created":{"date-parts":[[2012,9,30]],"date-time":"2012-09-30T17:00:25Z","timestamp":1349024425000},"page":"168-177","source":"Crossref","is-referenced-by-count":39,"title":["A 1.2 V 30 nm 3.2 Gb\/s\/pin 4 Gb DDR4 SDRAM With Dual-Error Detection and PVT-Tolerant Data-Fetch Scheme"],"prefix":"10.1109","volume":"48","author":[{"given":"Kyomin","family":"Sohn","sequence":"first","affiliation":[]},{"given":"Taesik","family":"Na","sequence":"additional","affiliation":[]},{"given":"Indal","family":"Song","sequence":"additional","affiliation":[]},{"given":"Yong","family":"Shim","sequence":"additional","affiliation":[]},{"given":"Wonil","family":"Bae","sequence":"additional","affiliation":[]},{"given":"Sanghee","family":"Kang","sequence":"additional","affiliation":[]},{"given":"Dongsu","family":"Lee","sequence":"additional","affiliation":[]},{"given":"Hangyun","family":"Jung","sequence":"additional","affiliation":[]},{"given":"Seokhun","family":"Hyun","sequence":"additional","affiliation":[]},{"given":"Hanki","family":"Jeoung","sequence":"additional","affiliation":[]},{"given":"Ki-Won","family":"Lee","sequence":"additional","affiliation":[]},{"given":"Jun-Seok","family":"Park","sequence":"additional","affiliation":[]},{"given":"Jongeun","family":"Lee","sequence":"additional","affiliation":[]},{"given":"Byunghyun","family":"Lee","sequence":"additional","affiliation":[]},{"given":"Inwoo","family":"Jun","sequence":"additional","affiliation":[]},{"given":"Juseop","family":"Park","sequence":"additional","affiliation":[]},{"given":"Junghwan","family":"Park","sequence":"additional","affiliation":[]},{"given":"Hundai","family":"Choi","sequence":"additional","affiliation":[]},{"given":"Sanghee","family":"Kim","sequence":"additional","affiliation":[]},{"given":"Haeyoung","family":"Chung","sequence":"additional","affiliation":[]},{"given":"Young","family":"Choi","sequence":"additional","affiliation":[]},{"given":"Dae-Hee","family":"Jung","sequence":"additional","affiliation":[]},{"given":"Byungchul","family":"Kim","sequence":"additional","affiliation":[]},{"given":"Jung-Hwan","family":"Choi","sequence":"additional","affiliation":[]},{"given":"Seong-Jin","family":"Jang","sequence":"additional","affiliation":[]},{"given":"Chi-Wook","family":"Kim","sequence":"additional","affiliation":[]},{"given":"Jung-Bae","family":"Lee","sequence":"additional","affiliation":[]},{"given":"Joo Sun","family":"Choi","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2010.2085991"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2009.2028948"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2009.2034417"},{"key":"ref5","first-page":"278","article-title":"A 60 nm 6 Gb\/s\/pin GDDR5 graphics DRAM with multifaceted clocking and ISI\/SSN-reduction techniques","author":"bae","year":"2008","journal-title":"IEEE ISSCC Dig Tech Papers"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2008.177"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/MC.2011.388"}],"container-title":["IEEE Journal of Solid-State Circuits"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/4\/6399535\/06316063.pdf?arnumber=6316063","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,10,10]],"date-time":"2021-10-10T23:51:36Z","timestamp":1633909896000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6316063\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2013,1]]},"references-count":6,"journal-issue":{"issue":"1"},"URL":"https:\/\/doi.org\/10.1109\/jssc.2012.2213512","relation":{},"ISSN":["0018-9200","1558-173X"],"issn-type":[{"value":"0018-9200","type":"print"},{"value":"1558-173X","type":"electronic"}],"subject":[],"published":{"date-parts":[[2013,1]]}}}