{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,4,7]],"date-time":"2026-04-07T16:29:13Z","timestamp":1775579353482,"version":"3.50.1"},"reference-count":16,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"1","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE J. Solid-State Circuits"],"published-print":{"date-parts":[[2013,1]]},"DOI":"10.1109\/jssc.2012.2215121","type":"journal-article","created":{"date-parts":[[2012,10,8]],"date-time":"2012-10-08T14:01:54Z","timestamp":1349704914000},"page":"178-185","source":"Crossref","is-referenced-by-count":178,"title":["An 8 Mb Multi-Layered Cross-Point ReRAM Macro With 443 MB\/s Write Throughput"],"prefix":"10.1109","volume":"48","author":[{"given":"Akifumi","family":"Kawahara","sequence":"first","affiliation":[]},{"given":"Ryotaro","family":"Azuma","sequence":"additional","affiliation":[]},{"given":"Yuuichirou","family":"Ikeda","sequence":"additional","affiliation":[]},{"given":"Ken","family":"Kawai","sequence":"additional","affiliation":[]},{"given":"Yoshikazu","family":"Katoh","sequence":"additional","affiliation":[]},{"given":"Yukio","family":"Hayakawa","sequence":"additional","affiliation":[]},{"given":"Kiyotaka","family":"Tsuji","sequence":"additional","affiliation":[]},{"given":"Shinichi","family":"Yoneda","sequence":"additional","affiliation":[]},{"given":"Atsushi","family":"Himeno","sequence":"additional","affiliation":[]},{"given":"Kazuhiko","family":"Shimakawa","sequence":"additional","affiliation":[]},{"given":"Takeshi","family":"Takagi","sequence":"additional","affiliation":[]},{"given":"Takumi","family":"Mikawa","sequence":"additional","affiliation":[]},{"given":"Kunitoshi","family":"Aono","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2009.2034414"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM.2008.4796676"},{"key":"ref12","first-page":"721","article-title":"Demonstration of high-density ReRAM ensuring 10-year retention at 85<formula formulatype=\"inline\"><tex Notation=\"TeX\">$^{\\circ}$<\/tex> <\/formula>C based on a newly developed reliability model","author":"wei","year":"2011","journal-title":"IEDM Tech Dig"},{"key":"ref13","first-page":"24","article-title":"Cross-point phase change memory with 4 F<formula formulatype=\"inline\"><tex Notation=\"TeX\">$^{2}$<\/tex> <\/formula> cell size driven by low-contact-resistivity poly-Si diode","author":"sasago","year":"2009","journal-title":"Symp VLSI Technology Dig"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM.2007.4419061"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/VLSIT.2010.5556121"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1016\/j.cap.2009.08.012"},{"key":"ref4","first-page":"198","article-title":"A 151 mm<formula formulatype=\"inline\"> <tex Notation=\"TeX\">$^{2}$<\/tex><\/formula> 64 Gb MLC NAND flash memory in 24 nm CMOS technology","author":"fukuda","year":"2011","journal-title":"IEEE ISSCC Dig Tech Papers"},{"key":"ref3","first-page":"500","article-title":"A 58 nm 1.8 V 1 Gb PRAM with 6.4 MB\/s program BW","author":"chung","year":"2011","journal-title":"IEEE ISSCC Dig Tech Papers"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2010.5433916"},{"key":"ref5","first-page":"436","article-title":"128 Gb 3b\/cell NAND flash memory in 19 nm technology with 18 MB\/s write rate and 400 Mb\/s toggle mode","author":"li","year":"2012","journal-title":"IEEE ISSCC Dig Tech Papers"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2010.5433948"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM.2009.5424413"},{"key":"ref2","first-page":"260","article-title":"A 0.13 <formula formulatype=\"inline\"> <tex Notation=\"TeX\">$\\mu$<\/tex><\/formula>m 64 Mb multi-layered conductive metal-oxide memory","author":"chevallier","year":"2010","journal-title":"IEEE ISSCC Dig Tech Papers"},{"key":"ref1","first-page":"210","article-title":"A 4 Mb conductive-bridge resistive memory with 2.3 GB\/s read-throughput and 216 MB\/s program-throughput","author":"otsuka","year":"2011","journal-title":"IEEE ISSCC Dig Tech Papers"},{"key":"ref9","first-page":"138","article-title":"A 16 Mb MRAM with FORK wiring scheme and burst modes","author":"iwata","year":"2006","journal-title":"IEEE ISSCC Dig Tech Papers"}],"container-title":["IEEE Journal of Solid-State Circuits"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/4\/6399535\/06327378.pdf?arnumber=6327378","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,11,14]],"date-time":"2017-11-14T08:53:13Z","timestamp":1510649593000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6327378\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2013,1]]},"references-count":16,"journal-issue":{"issue":"1"},"URL":"https:\/\/doi.org\/10.1109\/jssc.2012.2215121","relation":{},"ISSN":["0018-9200","1558-173X"],"issn-type":[{"value":"0018-9200","type":"print"},{"value":"1558-173X","type":"electronic"}],"subject":[],"published":{"date-parts":[[2013,1]]}}}