{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,6,3]],"date-time":"2026-06-03T20:26:14Z","timestamp":1780518374556,"version":"3.54.1"},"reference-count":25,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"12","license":[{"start":{"date-parts":[[2012,12,1]],"date-time":"2012-12-01T00:00:00Z","timestamp":1354320000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE J. Solid-State Circuits"],"published-print":{"date-parts":[[2012,12]]},"DOI":"10.1109\/jssc.2012.2216671","type":"journal-article","created":{"date-parts":[[2012,10,11]],"date-time":"2012-10-11T10:43:43Z","timestamp":1349952223000},"page":"3184-3196","source":"Crossref","is-referenced-by-count":86,"title":["A 2.4-GHz 20\u201340-MHz Channel WLAN Digital Outphasing Transmitter Utilizing a Delay-Based Wideband Phase Modulator in 32-nm CMOS"],"prefix":"10.1109","volume":"47","author":[{"given":"Ashoke","family":"Ravi","sequence":"first","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Paolo","family":"Madoglio","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Hongtao","family":"Xu","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Kailash","family":"Chandrashekar","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Marian","family":"Verhelst","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Stefano","family":"Pellerano","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Luis","family":"Cuellar","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Mariano","family":"Aguirre-Hernandez","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Masoud","family":"Sajadieh","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Jorge E.","family":"Zarate-Roldan","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Ofir","family":"Bochobza-Degani","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Hasnain","family":"Lakdawala","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Yorgos","family":"Palaskas","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2008.920321"},{"key":"ref11","first-page":"56","article-title":"A fully digital polar transmitter using a digital-to-time converter for high data rate system","author":"choi","year":"2009","journal-title":"Proc IEEE Radio Integr Technol Symp"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/RFIC.2010.5477259"},{"key":"ref13","first-page":"677","article-title":"A 600 MHz CMOS OFDM LINC transmitter with a 7 bit digital phase modulator","author":"kim","year":"2008","journal-title":"Proc IEEE Radio Frequency Integr Circuits Symp"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2012.2191032"},{"key":"ref15","first-page":"168","article-title":"A 20 dBm 2.4 GHz digital outphasing transmitter for WLAN application in 32 nm CMOS","author":"madoglio","year":"2012","journal-title":"Proc IEEE ISSCC"},{"key":"ref16","first-page":"26","article-title":"A 2.5 GHz delay-based wideband OFDM outphasing modulator in 45 nm-LP CMOS","author":"ravi","year":"2011","journal-title":"Proc VLSI Circuits Symp"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2007.914287"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2010.2099450"},{"key":"ref19","first-page":"352","article-title":"A 32 nm CMOS all-digital reconfigurable fractional frequency divider for LO generation in multistandard SoC radios with on-the-fly interference management","author":"chandrashekar","year":"2012","journal-title":"Proc IEEE ISSCC"},{"key":"ref4","doi-asserted-by":"crossref","first-page":"2048","DOI":"10.1109\/4.643663","article-title":"A 27-mW CMOS fractional-<formula formulatype=\"inline\"><tex Notation=\"TeX\">$ {\\rm N} $<\/tex><\/formula> synthesizer using digital compensation for 2.5-Mb\/s GFSK modulation","volume":"32","author":"perrott","year":"1997","journal-title":"IEEE J Solid-State Circuits"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2011.2143930"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2004.836345"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2005.857417"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2009.2014729"},{"key":"ref7","first-page":"376","article-title":"A fully digital multimode polar transmitter employing 17 b RF DAC in 3G mode","author":"boos","year":"2011","journal-title":"Proc IEEE ISSCC"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/TCOM.1974.1092141"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/TMTT.2005.848770"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/JRPROC.1935.227299"},{"key":"ref20","first-page":"1","article-title":"A 32 nm SoC platform technology with 2nd generation high-<formula formulatype=\"inline\"><tex Notation=\"TeX\">$ {\\rm k} $<\/tex><\/formula>\/metal gate transistors optimized for ultra low power, high performance, and high density product applications","author":"jan","year":"2009","journal-title":"IEEE IEDM Tech Dig"},{"key":"ref22","first-page":"356","article-title":"A 1<formula formulatype=\"inline\"> <tex Notation=\"TeX\">$\\,\\times\\,$<\/tex><\/formula>2 MIMO multi-band CMOS transceiver with an integrated front-end in 90 nm CMOS for 802.11a\/g\/n WLAN applications","author":"degani","year":"2008","journal-title":"Proc IEEE ISSCC"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2010.5433962"},{"key":"ref24","first-page":"76","article-title":"A 2.4 GHz WLAN transceiver with fully-integrated highly-linear 1.8 V 28.4 dBm PA, 34 dBm T\/R switch, 240 MS\/s DAC, 320 MS\/s ADC, and DPLL in 32 nm SoC CMOS","author":"tan","year":"2012","journal-title":"Proc VLSI Circuits Symp"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/ESSCIRC.2009.5325998"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2012.2191674"}],"container-title":["IEEE Journal of Solid-State Circuits"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/4\/6392234\/06328226.pdf?arnumber=6328226","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,10,10]],"date-time":"2021-10-10T23:50:34Z","timestamp":1633909834000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6328226\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2012,12]]},"references-count":25,"journal-issue":{"issue":"12"},"URL":"https:\/\/doi.org\/10.1109\/jssc.2012.2216671","relation":{},"ISSN":["0018-9200","1558-173X"],"issn-type":[{"value":"0018-9200","type":"print"},{"value":"1558-173X","type":"electronic"}],"subject":[],"published":{"date-parts":[[2012,12]]}}}