{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,9,29]],"date-time":"2025-09-29T12:07:00Z","timestamp":1759147620843},"reference-count":20,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"6","license":[{"start":{"date-parts":[[2013,6,1]],"date-time":"2013-06-01T00:00:00Z","timestamp":1370044800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE J. Solid-State Circuits"],"published-print":{"date-parts":[[2013,6]]},"DOI":"10.1109\/jssc.2013.2257491","type":"journal-article","created":{"date-parts":[[2013,4,29]],"date-time":"2013-04-29T18:03:04Z","timestamp":1367258584000},"page":"1465-1474","source":"Crossref","is-referenced-by-count":20,"title":["A Second-Order \u0394\u03a3 ADC Using Noise-Shaped Two-Step Integrating Quantizer"],"prefix":"10.1109","volume":"48","author":[{"family":"Taehwan Oh","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"N.","family":"Maghari","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"family":"Un-Ku Moon","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1049\/el.2009.0744"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2009.2032636"},{"key":"ref12","first-page":"174","article-title":"A 20 MHz BW 68 dB DR CT <formula formulatype=\"inline\"><tex Notation=\"TeX\">$\\Delta \\Sigma$<\/tex> <\/formula> ADC based on a multi-bit time-domain quantizer and feedback element","author":"dhanasekaran","year":"2009","journal-title":"IEEE ISSCC Dig Tech Papers"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/4.121557"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1049\/el:20010542"},{"key":"ref15","doi-asserted-by":"crossref","first-page":"753","DOI":"10.1109\/82.476173","article-title":"Linearity enhancement of multibit <formula formulatype=\"inline\"><tex Notation=\"TeX\">$\\Delta \\Sigma$<\/tex><\/formula> A\/D and D\/A converters using data weighted averaging","volume":"42","author":"baird","year":"1995","journal-title":"IEEE Trans Circuits Syst II"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2010.2042246"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/4.826813"},{"key":"ref18","first-page":"441","article-title":"A 2.5 V 10b 120 Msample\/s CMOS pipelined ADC with high SFDR","author":"yoo","year":"2002","journal-title":"Proc IEEE Custom Integrated Circuits Conf (CICC)"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2006.884330"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/VLSIC.2007.4342735"},{"key":"ref3","first-page":"174","article-title":"An 80 MHz 4x oversampled cascaded <formula formulatype=\"inline\"><tex Notation=\"TeX\">$\\Delta \\Sigma$<\/tex><\/formula>-Pipelined ADC with 75 dB DR and 87 dB SFDR","author":"bosi","year":"2005","journal-title":"IEEE ISSCC Dig Tech Papers"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2011.2164964"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2008.917500"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2006.881825"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2011.2164293"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/4.890295"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/4.643648"},{"key":"ref9","first-page":"162","article-title":"A 5 MHz BW 70.7 dB SNDR noise-shaped two-step quantizer based <formula formulatype=\"inline\"><tex Notation=\"TeX\">$\\Delta \\Sigma$<\/tex><\/formula> ADC","author":"oh","year":"2012","journal-title":"IEEE Symp VLSI Circuits Dig Tech Papers"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2010.2043382"}],"container-title":["IEEE Journal of Solid-State Circuits"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/4\/6518166\/06509997.pdf?arnumber=6509997","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,11,29]],"date-time":"2021-11-29T20:28:41Z","timestamp":1638217721000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6509997\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2013,6]]},"references-count":20,"journal-issue":{"issue":"6"},"URL":"https:\/\/doi.org\/10.1109\/jssc.2013.2257491","relation":{},"ISSN":["0018-9200","1558-173X"],"issn-type":[{"value":"0018-9200","type":"print"},{"value":"1558-173X","type":"electronic"}],"subject":[],"published":{"date-parts":[[2013,6]]}}}