{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,4,4]],"date-time":"2026-04-04T06:05:23Z","timestamp":1775282723325,"version":"3.50.1"},"reference-count":32,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"8","license":[{"start":{"date-parts":[[2013,8,1]],"date-time":"2013-08-01T00:00:00Z","timestamp":1375315200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE J. Solid-State Circuits"],"published-print":{"date-parts":[[2013,8]]},"DOI":"10.1109\/jssc.2013.2259038","type":"journal-article","created":{"date-parts":[[2013,7,19]],"date-time":"2013-07-19T18:04:22Z","timestamp":1374257062000},"page":"1943-1953","source":"Crossref","is-referenced-by-count":448,"title":["SpiNNaker: A 1-W 18-Core System-on-Chip for Massively-Parallel Neural Network Simulation"],"prefix":"10.1109","volume":"48","author":[{"given":"Eustace","family":"Painkras","sequence":"first","affiliation":[]},{"given":"Luis A.","family":"Plana","sequence":"additional","affiliation":[]},{"given":"Jim","family":"Garside","sequence":"additional","affiliation":[]},{"given":"Steve","family":"Temple","sequence":"additional","affiliation":[]},{"given":"Francesco","family":"Galluppi","sequence":"additional","affiliation":[]},{"given":"Cameron","family":"Patterson","sequence":"additional","affiliation":[]},{"given":"David R.","family":"Lester","sequence":"additional","affiliation":[]},{"given":"Andrew D.","family":"Brown","sequence":"additional","affiliation":[]},{"given":"Steve B.","family":"Furber","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1016\/j.jneumeth.2012.03.001"},{"key":"ref31","first-page":"7","article-title":"Interfacing real-time spiking I\/O with the SpiNNaker neuromimetic architecture","volume":"11","author":"davies","year":"2010","journal-title":"Proc Int Conf Neural Inf Process"},{"key":"ref30","first-page":"226","article-title":"A real-time, event driven neuromorphic system for goal-directed attentional selection","author":"galluppi","year":"2012","journal-title":"Proc Int Conf Neural Inf Process"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1038\/nrn1848"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1147\/rd.521.0031"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1145\/1978542.1978559"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/MSPEC.2010.5644776"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/IJCNN.2011.6033558"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/MSPEC.2012.6247562"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/TNN.2003.820440"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1113\/jphysiol.1952.sp004764"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/FCCM.2012.32"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1016\/j.jpdc.2012.01.016"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2010.5536970"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/CICC.2012.6330636"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.3389\/fnins.2011.00073"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/ASYNC.2009.17"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-642-00641-8_38"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.3389\/fninf.2011.00019"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/ASYNC.2012.18"},{"key":"ref8","author":"dayan","year":"2005","journal-title":"Theoretical Neuroscience Computational and Mathematical Modeling of Neural Systems"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2007.907830"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1523\/JNEUROSCI.3575-07.2007"},{"key":"ref1","article-title":"Overview of the SpiNNaker system architecture","volume":"pp","author":"furber","year":"2012","journal-title":"IEEE Trans Comput"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/MC.2009.341"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1007\/978-1-4615-2724-4"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/MDT.2007.149"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/IJCNN.2010.5596759"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2002.1044296"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1145\/2043643.2043647"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/ASYNC.2009.21"},{"key":"ref25","year":"0","journal-title":"Axi protocol specification"}],"container-title":["IEEE Journal of Solid-State Circuits"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/4\/6564404\/06515159.pdf?arnumber=6515159","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,11,29]],"date-time":"2021-11-29T20:28:42Z","timestamp":1638217722000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6515159\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2013,8]]},"references-count":32,"journal-issue":{"issue":"8"},"URL":"https:\/\/doi.org\/10.1109\/jssc.2013.2259038","relation":{},"ISSN":["0018-9200","1558-173X"],"issn-type":[{"value":"0018-9200","type":"print"},{"value":"1558-173X","type":"electronic"}],"subject":[],"published":{"date-parts":[[2013,8]]}}}