{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,10,28]],"date-time":"2026-10-28T16:51:02Z","timestamp":1793206262657,"version":"4.5.0"},"reference-count":18,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"12","license":[{"start":{"date-parts":[[2013,12,1]],"date-time":"2013-12-01T00:00:00Z","timestamp":1385856000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE J. Solid-State Circuits"],"published-print":{"date-parts":[[2013,12]]},"DOI":"10.1109\/jssc.2013.2278471","type":"journal-article","created":{"date-parts":[[2013,8,28]],"date-time":"2013-08-28T16:19:01Z","timestamp":1377706741000},"page":"3011-3018","source":"Crossref","is-referenced-by-count":147,"title":["A 10b\/12b 40 kS\/s SAR ADC With Data-Driven Noise Reduction Achieving up to 10.1b ENOB at 2.2 fJ\/Conversion-Step"],"prefix":"10.1109","volume":"48","author":[{"given":"Pieter","family":"Harpe","sequence":"first","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Eugenio","family":"Cantatore","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Arthur","family":"van Roermund","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref10","first-page":"270","article-title":"A 2.2\/2.7 fJ\/conversion-step 10\/12b 40 kS\/s SAR ADC with data-driven noise reduction","author":"harpe","year":"2013","journal-title":"IEEE ISSCC Dig Tech Papers"},{"key":"ref11","author":"schreier","year":"2005","journal-title":"Understanding Delta-Sigma Data Converters"},{"key":"ref12","first-page":"244","article-title":"A 1.9 <formula formulatype=\"inline\"><tex Notation=\"TeX\">$\\mu$<\/tex><\/formula> W 4.4 fJ\/conversion-step 10b 1 MS\/s charge-redistribution ADC","author":"van elzakker","year":"2008","journal-title":"IEEE ISSCC Dig Tech Papers"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1007\/978-1-4614-1371-4"},{"key":"ref14","first-page":"238","article-title":"An 820 <formula formulatype=\"inline\"><tex Notation=\"TeX\">$\\mu$<\/tex><\/formula> W 9b 40 MS\/s noise-tolerant dynamic-SAR ADC in 90 nm digital CMOS","author":"giannini","year":"2008","journal-title":"IEEE ISSCC Dig Tech Papers"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2013.6487731"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2011.2143870"},{"key":"ref17","doi-asserted-by":"crossref","first-page":"1948","DOI":"10.1109\/4.735535","article-title":"A 10-b, 500-MSample\/s CMOS DAC in 0.6 mm<formula formulatype=\"inline\"><tex Notation=\"TeX\">$^2$<\/tex><\/formula>","volume":"33","author":"lin","year":"1998","journal-title":"IEEE J Solid-State Circuits"},{"key":"ref18","doi-asserted-by":"crossref","first-page":"2669","DOI":"10.1109\/JSSC.2006.884231","article-title":"A 6-bit 600-MS\/s 5.3-mW asynchronous ADC in 0.13-<formula formulatype=\"inline\"><tex Notation=\"TeX\">$\\mu$<\/tex> <\/formula>m CMOS","volume":"41","author":"chen","year":"2006","journal-title":"IEEE J Solid-State Circuits"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2012.2191212"},{"key":"ref3","first-page":"118","article-title":"A 160 <formula formulatype=\"inline\"><tex Notation=\"TeX\">$\\mu$<\/tex> <\/formula>W biopotential acquisition ASIC with fully integrated IA and motion-artifact suppression","author":"van helleputte","year":"2012","journal-title":"IEEE ISSCC Dig Tech Papers"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2012.2217874"},{"key":"ref5","author":"murmann","year":"2013","journal-title":"ADC Performance Survey 1997?2013"},{"key":"ref8","first-page":"241","article-title":"A 1 V 11 fJ\/conversion-step 10 bit 10 MS\/s asynchronous SAR ADC in 0.18 <formula formulatype=\"inline\"> <tex Notation=\"TeX\">$\\mu$<\/tex><\/formula>m CMOS","author":"liu","year":"2010","journal-title":"Proc IEEE Symp VLSI Circuits"},{"key":"ref7","first-page":"474","article-title":"A 31.3 fJ\/conversion-step 70.4 dB SNDR 30 MS\/s 1.2 V two-step pipelined ADC in 0.13 <formula formulatype=\"inline\"><tex Notation=\"TeX\">$\\mu$<\/tex><\/formula>m CMOS","author":"lee","year":"2012","journal-title":"IEEE ISSCC Dig Tech Papers"},{"key":"ref2","first-page":"373","article-title":"A 0.7 V 7-to-10 bit 0-to-2 MS\/s flexible SAR ADC for ultra low-power wireless sensor nodes","author":"harpe","year":"2012","journal-title":"Proc ESSCIRC"},{"key":"ref1","first-page":"92","article-title":"A 3.2 fJ\/c.-s. 0.35 V 10b 100 kS\/s SAR ADC in 90 nm CMOS","author":"tai","year":"2012","journal-title":"Proc IEEE Symp VLSI Circuits"},{"key":"ref9","first-page":"268","article-title":"A 28 fJ\/conv-step CT <formula formulatype=\"inline\"><tex Notation=\"TeX\">$\\Delta \\Sigma$<\/tex><\/formula> modulator with 78 dB DR and 18 MHz BW in 28 nm CMOS using a highly digital multibit quantizer","author":"shu","year":"2013","journal-title":"IEEE ISSCC Dig Tech Papers"}],"container-title":["IEEE Journal of Solid-State Circuits"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/4\/6671390\/06587588.pdf?arnumber=6587588","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,11,29]],"date-time":"2021-11-29T15:28:44Z","timestamp":1638199724000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6587588\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2013,12]]},"references-count":18,"journal-issue":{"issue":"12"},"URL":"https:\/\/doi.org\/10.1109\/jssc.2013.2278471","relation":{},"ISSN":["0018-9200","1558-173X"],"issn-type":[{"value":"0018-9200","type":"print"},{"value":"1558-173X","type":"electronic"}],"subject":[],"published":{"date-parts":[[2013,12]]}}}