{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,5,30]],"date-time":"2025-05-30T05:44:20Z","timestamp":1748583860713},"reference-count":29,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"11","license":[{"start":{"date-parts":[[2013,11,1]],"date-time":"2013-11-01T00:00:00Z","timestamp":1383264000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE J. Solid-State Circuits"],"published-print":{"date-parts":[[2013,11]]},"DOI":"10.1109\/jssc.2013.2280238","type":"journal-article","created":{"date-parts":[[2013,9,18]],"date-time":"2013-09-18T18:04:21Z","timestamp":1379527461000},"page":"2894-2907","source":"Crossref","is-referenced-by-count":14,"title":["A 57 mW 12.5 \u00b5J\/Epoch Embedded Mixed-Mode Neuro-Fuzzy Processor for Mobile Real-Time Object Recognition"],"prefix":"10.1109","volume":"48","author":[{"given":"Jinwook","family":"Oh","sequence":"first","affiliation":[]},{"given":"Gyeonghoon","family":"Kim","sequence":"additional","affiliation":[]},{"given":"Byeong-Gyu","family":"Nam","sequence":"additional","affiliation":[]},{"given":"Hoi-Jun","family":"Yoo","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/TNN.2004.824274"},{"key":"ref11","first-page":"130","article-title":"A 57 mW embedded mixed-mode neuro-fuzzy accelerator for intelligent multi-core processor","author":"oh","year":"2011","journal-title":"IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers"},{"key":"ref12","doi-asserted-by":"crossref","first-page":"665","DOI":"10.1109\/21.256541","article-title":"ANFIS: Adaptive-network-based fuzzy inference system","volume":"23","author":"jang","year":"1993","journal-title":"IEEE Trans Syst Man Cybern"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/NAFIPS.2009.5156481"},{"key":"ref14","first-page":"43","article-title":"Artificial neural network on a SIMD architecture","author":"brown","year":"1998","journal-title":"Proc Frontiers of Massively Parallel Computation"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/IISWC.2011.6114206"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2008.63"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/91.890338"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/91.544303"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1016\/j.fss.2006.07.001"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/CNNA.2008.4588653"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1016\/S0165-0114(96)00248-5"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2005.848021"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2009.2031768"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/PDP.2010.43"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2012.2198249"},{"key":"ref29","year":"0","journal-title":"OMAP4430 Processor Technical Reference Manual Ver AN"},{"key":"ref8","first-page":"1","article-title":"Neuromorphic models on a GPGPU cluster","author":"sheu","year":"2010","journal-title":"Proc IEEE Conf Neural Networks"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/IJCNN.2011.6033575"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/NER.2009.5109322"},{"key":"ref9","first-page":"529","article-title":"A massively parallel digital learning processor","author":"graf","year":"2009","journal-title":"Proc Adv Neur Inf Process Syst"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2010.2075430"},{"key":"ref20","doi-asserted-by":"crossref","first-page":"309","DOI":"10.1016\/S0045-7906(99)00008-7","article-title":"A Design approach or analog neuro\/fuzzy systems in CMOS digital technologies","volume":"25","author":"verdu","year":"1999","journal-title":"Computer Electronics and Engineering"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1016\/j.fss.2006.06.006"},{"key":"ref21","first-page":"607","article-title":"A high-speed fuzzy inference processor for trapezoid-shaped membership functions","volume":"21","author":"hwang","year":"2005","journal-title":"J Information Science and Engineering"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/4.104196"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/TNN.2005.852237"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/ASSCC.2011.6123598"},{"key":"ref25","first-page":"252","article-title":"A 75 <ref_formula><tex Notation=\"TeX\">$\\mu\\hbox{W}$<\/tex><\/ref_formula>, 16-channel neural spike-sorting processor with unsupervised clustering","author":"karkare","year":"2011","journal-title":"Proc IEEE Symp VLSI Circuits"}],"container-title":["IEEE Journal of Solid-State Circuits"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/4\/6642065\/06603359.pdf?arnumber=6603359","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,11,29]],"date-time":"2021-11-29T20:28:45Z","timestamp":1638217725000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6603359\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2013,11]]},"references-count":29,"journal-issue":{"issue":"11"},"URL":"https:\/\/doi.org\/10.1109\/jssc.2013.2280238","relation":{},"ISSN":["0018-9200","1558-173X"],"issn-type":[{"value":"0018-9200","type":"print"},{"value":"1558-173X","type":"electronic"}],"subject":[],"published":{"date-parts":[[2013,11]]}}}