{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,10,15]],"date-time":"2026-10-15T07:09:46Z","timestamp":1792048186237,"version":"4.4.0"},"reference-count":21,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"4","license":[{"start":{"date-parts":[[2014,4,1]],"date-time":"2014-04-01T00:00:00Z","timestamp":1396310400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE J. Solid-State Circuits"],"published-print":{"date-parts":[[2014,4]]},"DOI":"10.1109\/jssc.2013.2292055","type":"journal-article","created":{"date-parts":[[2014,1,31]],"date-time":"2014-01-31T17:42:16Z","timestamp":1391190136000},"page":"896-907","source":"Crossref","is-referenced-by-count":171,"title":["1 Mb 0.41 \u00b5m\u00b2 2T-2R Cell Nonvolatile TCAM With Two-Bit Encoding and Clocked Self-Referenced Sensing"],"prefix":"10.1109","volume":"49","author":[{"given":"Jing","family":"Li","sequence":"first","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Robert K.","family":"Montoye","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Masatoshi","family":"Ishii","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Leland","family":"Chang","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2004.838016"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/6.755442"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1147\/rd.524.0439"},{"key":"ref13","article-title":"Design challenges in multi-level phase change memory","author":"li","year":"2010","journal-title":"New Non-Volatile Memory Workshop (NNVMW'10) Industrial Technology Research Inst (ITRI)"},{"key":"ref14","first-page":"289","article-title":"Fully parallel 6T-2MTJ nonvolatile TCAM with single-transistor-based self match-line discharge control","author":"matsunaga","year":"2011","journal-title":"Proc VLSI Symp"},{"key":"ref15","first-page":"44","article-title":"A 3.14 <formula formulatype=\"inline\"> <tex Notation=\"TeX\">$\\mu$<\/tex><\/formula>m<formula formulatype=\"inline\"><tex Notation=\"TeX\">$^2$<\/tex><\/formula> 4T-2MTJ-cell fully parallel TCAM based on nonvolatile logic-in-memory architecture","author":"matsunaga","year":"2012","journal-title":"Proc VLSI Symp"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2012.6164998"},{"key":"ref17","year":"0","journal-title":"SNORT network intrusion detection system"},{"key":"ref18","doi-asserted-by":"crossref","first-page":"193","DOI":"10.1145\/1090191.1080115","article-title":"Algorithms for advanced packet classification with ternary CAMs","author":"lakshminarayanan","year":"2005","journal-title":"Proc ACM Sigcomm"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/IRPS.2012.6241871"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.1993.693058"},{"key":"ref3","first-page":"28","article-title":"Efficient multi-match packet classification with TCAM","author":"yu","year":"2004","journal-title":"Proc IEEE Symp High Performance Interconnects (HotI)"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2005.864128"},{"key":"ref5","doi-asserted-by":"crossref","first-page":"2126","DOI":"10.1109\/83.887981","article-title":"On<?Pub _bookmark Command=\"[Quick Mark]\"?> using the CAM concept for parametric curve extraction","volume":"9","author":"meribout","year":"2000","journal-title":"IEEE Trans Image Process"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/65.912717"},{"key":"ref7","year":"0","journal-title":"Micron DDR3 SDRAM Products"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2004.1289292"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2003.818139"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/INFCOM.1993.253403"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/CICC.2006.320819"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/VLSIT.2007.4339743"}],"container-title":["IEEE Journal of Solid-State Circuits"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/4\/6777594\/06680770.pdf?arnumber=6680770","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,12]],"date-time":"2022-01-12T16:30:36Z","timestamp":1642005036000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6680770\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2014,4]]},"references-count":21,"journal-issue":{"issue":"4"},"URL":"https:\/\/doi.org\/10.1109\/jssc.2013.2292055","relation":{},"ISSN":["0018-9200","1558-173X"],"issn-type":[{"value":"0018-9200","type":"print"},{"value":"1558-173X","type":"electronic"}],"subject":[],"published":{"date-parts":[[2014,4]]}}}