{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,10,1]],"date-time":"2025-10-01T16:23:01Z","timestamp":1759335781477},"reference-count":28,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"10","license":[{"start":{"date-parts":[[2014,10,1]],"date-time":"2014-10-01T00:00:00Z","timestamp":1412121600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE J. Solid-State Circuits"],"published-print":{"date-parts":[[2014,10]]},"DOI":"10.1109\/jssc.2014.2345021","type":"journal-article","created":{"date-parts":[[2014,8,20]],"date-time":"2014-08-20T18:30:54Z","timestamp":1408559454000},"page":"2172-2186","source":"Crossref","is-referenced-by-count":34,"title":["A Hybrid Loop Two-Point Modulator Without DCO Nonlinearity Calibration by Utilizing 1 Bit High-Pass Modulation"],"prefix":"10.1109","volume":"49","author":[{"given":"Ni","family":"Xu","sequence":"first","affiliation":[]},{"given":"Woogeun","family":"Rhee","sequence":"additional","affiliation":[]},{"given":"Zhihua","family":"Wang","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2011.2162917"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2012.2217854"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2012.2186720"},{"key":"ref13","first-page":"174","article-title":"An all-digital 8-DPSK polar transmitter with second-order approximation scheme and phase rotation-constant digital PA for Bluetooth EDR in 65 nm CMOS","author":"kobayashi","year":"2011","journal-title":"IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2011.2162769"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2011.2114735"},{"key":"ref16","first-page":"197","article-title":"A low-cost, leakage-insensitive semi-digital PLL with linear phase detection and FIR-embedded digital frequency acquisition","author":"he","year":"2010","journal-title":"Proc IEEE Asian Solid-State Circuits Conf (A-SSCC)"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2003.819126"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2006.884391"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2009.2022304"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2005.858750"},{"key":"ref4","doi-asserted-by":"crossref","first-page":"1531","DOI":"10.1109\/22.942563","article-title":"A low-IF RX two-point <formula formulatype=\"inline\"><tex Notation=\"TeX\">$\\Sigma \\Delta$<\/tex><\/formula>-modulation TX CMOS single-chip Bluetooth solution","volume":"49","author":"durdodt","year":"2001","journal-title":"IEEE Trans Microw Theory Tech"},{"key":"ref27","first-page":"383","article-title":"VCO gain calibration technique for GSM\/EDGE polar modulated transmitter","author":"ahn","year":"2008","journal-title":"Proc IEEE Radio Freq Integr Circuits Symp (RFIC)"},{"key":"ref3","first-page":"420","article-title":"A 2.4 GHz 2 Mb\/s versatile PLL-based transmitter using digital pre-emphasis and auto calibration in 0.18 <formula formulatype=\"inline\"><tex Notation=\"TeX\">$\\mu$<\/tex><\/formula>m CMOS for WPAN","author":"shanan","year":"2009","journal-title":"IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/MWSYM.2002.1011646"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2011.2166432"},{"key":"ref8","doi-asserted-by":"crossref","first-page":"1748","DOI":"10.1109\/TMTT.2010.2049693","article-title":"Self-calibrated two-point Delta-Sigma modulation technique for RF transmitters","volume":"58","author":"lee","year":"2010","journal-title":"IEEE Trans Microw Theory Tech"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2004.836342"},{"key":"ref2","doi-asserted-by":"crossref","first-page":"18","DOI":"10.1109\/4.974542","article-title":"A 2.5-Mbls GFSK 5.0-Mb\/s 4-FSK automatically calibrated <formula formulatype=\"inline\"><tex Notation=\"TeX\">$\\Sigma \\Delta$<\/tex><\/formula> frequency synthesizer","volume":"37","author":"mcmahill","year":"2002","journal-title":"IEEE J Solid- State Circuits"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2005.857417"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/4.643663"},{"key":"ref20","first-page":"1","article-title":"A 1.6 mW 1.6 ps-rms-jitter 2.5 GHz digital PLL with 0.7-to-3.5 GHz frequency range in 90 nm CMOS","author":"yin","year":"2010","journal-title":"Proc IEEE Custom Integr Circuits Conf (CICC)"},{"key":"ref22","first-page":"98","article-title":"A 570 fsrms integrated-jitter ring-VCO-based 1.21 GHz PLL with hybrid loop","author":"sai","year":"2011","journal-title":"IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2011.2168873"},{"key":"ref24","doi-asserted-by":"crossref","first-page":"2426","DOI":"10.1109\/JSSC.2009.2021086","article-title":"An FIR-embedded noise filtering method for <formula formulatype=\"inline\"><tex Notation=\"TeX\">$\\Delta \\Sigma$<\/tex><\/formula> fractional-N PLL clock generators","volume":"44","author":"yu","year":"2009","journal-title":"IEEE J Solid-State Circuits"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/LMWC.2012.2228178"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2002.800925"},{"key":"ref25","doi-asserted-by":"crossref","first-page":"3654","DOI":"10.1109\/TMTT.2006.882872","article-title":"Closed-loop nonlinear modeling of wideband <formula formulatype=\"inline\"><tex Notation=\"TeX\">$\\Delta \\Sigma$<\/tex> <\/formula> fractional-N frequency synthesizers","volume":"54","author":"hedayati","year":"2006","journal-title":"IEEE Trans Microw Theory Tech"}],"container-title":["IEEE Journal of Solid-State Circuits"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/4\/6906543\/06880850.pdf?arnumber=6880850","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,12]],"date-time":"2022-01-12T16:51:08Z","timestamp":1642006268000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/6880850"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2014,10]]},"references-count":28,"journal-issue":{"issue":"10"},"URL":"https:\/\/doi.org\/10.1109\/jssc.2014.2345021","relation":{},"ISSN":["0018-9200","1558-173X"],"issn-type":[{"value":"0018-9200","type":"print"},{"value":"1558-173X","type":"electronic"}],"subject":[],"published":{"date-parts":[[2014,10]]}}}