{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,1,21]],"date-time":"2026-01-21T19:29:41Z","timestamp":1769023781452,"version":"3.49.0"},"reference-count":22,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"5","license":[{"start":{"date-parts":[[2016,5,1]],"date-time":"2016-05-01T00:00:00Z","timestamp":1462060800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE J. Solid-State Circuits"],"published-print":{"date-parts":[[2016,5]]},"DOI":"10.1109\/jssc.2016.2527718","type":"journal-article","created":{"date-parts":[[2016,3,1]],"date-time":"2016-03-01T19:22:34Z","timestamp":1456860154000},"page":"1313-1324","source":"Crossref","is-referenced-by-count":23,"title":["Rail Clamp with Dynamic Time-Constant Adjustment"],"prefix":"10.1109","volume":"51","author":[{"given":"Ramachandran","family":"Venkatasubramanian","sequence":"first","affiliation":[]},{"given":"Kent","family":"Oertle","sequence":"additional","affiliation":[]},{"given":"Sule","family":"Ozev","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/EOSESD.2004.5272597"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1016\/j.microrel.2004.05.008"},{"key":"ref12","first-page":"7a.3-1","article-title":"A transient power supply\ufffdESD clamp with CMOS thyristor delay element","author":"sarbishaei","year":"0","journal-title":"Proc 29th Elect Overstress\/Electrostatic Discharge Symp"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/TDMR.2008.918984"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2010.2075370"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/CICC.2001.929720"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/16.737457"},{"key":"ref17","first-page":"666","article-title":"Optimization on NMOS-based power-rail ESD clamp circuits with gate-driven mechanism in a $0.13-\\mu\\text{m}$ CMOS technology","author":"chen","year":"0","journal-title":"Proc 15th IEEE Int Conf Electron Circuits Syst (ICECS’08)"},{"key":"ref18","first-page":"1","article-title":"When good trigger circuits go bad: A case history","author":"gerdemann","year":"0","journal-title":"Proc 33rd Elect Overstress\/Electrost Discharge Symp (EOS\/ESD’11)"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2013.2274701"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2009.2019164"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2013.2241441"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2015.2446460"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/ICICDT.2010.5510299"},{"key":"ref8","first-page":"1","article-title":"Boosted and distributed rail clamp networks for ESD protection in advanced CMOS technologies","author":"stockinger","year":"0","journal-title":"Proc Electrical Overstress\/Electrostatic Discharge (EOS\/ESD) Symp"},{"key":"ref7","article-title":"Circuit for electrostatic discharge protection","author":"miller","year":"1999"},{"key":"ref2","first-page":"179","article-title":"Design and characterization of a multi-RC-triggered MOSFET-based power clamp for on-chip ESD protection","author":"li","year":"0","journal-title":"Proc Electrical Overstress\/Electrostatic Discharge (EOS\/ESD) Symp"},{"key":"ref1","first-page":"233","article-title":"ESD design methodology","author":"merrill","year":"0","journal-title":"Proc Elect Overstress\/Electrostat Discharge Symp"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1016\/S0026-2714(03)00123-9"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/TDMR.2013.2280044"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/EOSESD.2004.5272616"},{"key":"ref21","year":"2012","journal-title":"For Electrostatic Discharge Sensitivity Testing-Human Body Model(HBM)-Component Level"}],"container-title":["IEEE Journal of Solid-State Circuits"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/4\/7465846\/07422683.pdf?arnumber=7422683","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,12]],"date-time":"2022-01-12T16:43:23Z","timestamp":1642005803000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7422683\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2016,5]]},"references-count":22,"journal-issue":{"issue":"5"},"URL":"https:\/\/doi.org\/10.1109\/jssc.2016.2527718","relation":{},"ISSN":["0018-9200","1558-173X"],"issn-type":[{"value":"0018-9200","type":"print"},{"value":"1558-173X","type":"electronic"}],"subject":[],"published":{"date-parts":[[2016,5]]}}}