{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,4,25]],"date-time":"2026-04-25T14:35:38Z","timestamp":1777127738818,"version":"3.51.4"},"reference-count":23,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"11","license":[{"start":{"date-parts":[[2016,11,1]],"date-time":"2016-11-01T00:00:00Z","timestamp":1477958400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"funder":[{"DOI":"10.13039\/501100003393","name":"Fujitsu Laboratories of America","doi-asserted-by":"publisher","id":[{"id":"10.13039\/501100003393","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE J. Solid-State Circuits"],"published-print":{"date-parts":[[2016,11]]},"DOI":"10.1109\/jssc.2016.2602224","type":"journal-article","created":{"date-parts":[[2016,9,29]],"date-time":"2016-09-29T14:55:08Z","timestamp":1475160908000},"page":"2679-2689","source":"Crossref","is-referenced-by-count":54,"title":["A 20 Gb\/s CMOS Optical Receiver With Limited-Bandwidth Front End and Local Feedback IIR-DFE"],"prefix":"10.1109","volume":"51","author":[{"ORCID":"https:\/\/orcid.org\/0000-0001-5599-9622","authenticated-orcid":false,"given":"Alireza","family":"Sharif-Bakhtiar","sequence":"first","affiliation":[]},{"given":"Anthony","family":"Chan Carusone","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","first-page":"283","article-title":"A 25Gb\/s \n$170\\mu $\nW\/Gb\/s optical receiver in 28nm CMOS for chip-to-chip optical communication","author":"saeedi","year":"2014","journal-title":"Proc IEEE Radio Freq Integr Circuits Symp"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/JLT.2015.2494060"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1364\/OFC.2011.OThP3"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2013.6487668"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/MWSYM.1990.99544"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2009.2031015"},{"key":"ref16","first-page":"272c","article-title":"A 10 Gb\/s 2-IIR-tap DFE receiver with 35 dB loss compensation in 65-nm CMOS","author":"elhadidy","year":"2013","journal-title":"Proc Symp VLSI Circuits (VLSIC)"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2015.2402218"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2003.820884"},{"key":"ref19","first-page":"418","article-title":"25Gb\/s 3.6pJ\/b and 15Gb\/s 1.37pJ\/b VCSEL-based optical links in 90nm CMOS","author":"proesel","year":"2012","journal-title":"IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/RFIC.2005.1489794"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1002\/0471726400"},{"key":"ref6","first-page":"118","article-title":"A 4 \n$\\times$\n 25-to-28Gb\/s 4.9mW\/Gb\/s ?9.7dBm highsensitivity optical receiver based on 65nm CMOS for board-to-board interconnects","author":"takemoto","year":"2013","journal-title":"IEEE Int Solid-State Circuits Conf Dig"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2014.2365700"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1002\/j.1538-7305.1974.tb02761.x"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1002\/j.1538-7305.1973.tb01993.x"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2014.6757379"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1364\/OFC.2014.Th3C.2"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2012.2227612"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1364\/OFC.2013.OM2H.2"},{"key":"ref22","first-page":"334","article-title":"A 100mW \n$4\\times10$\nGb\/s transceiver in 80nm CMOS for high-density optical interconnects","volume":"1","author":"kromer","year":"2005","journal-title":"IEEE Int Solid-State Circuits Conf Dig"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2015.2478837"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1364\/CLEO_SI.2014.STu1G.6"}],"container-title":["IEEE Journal of Solid-State Circuits"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/4\/7637051\/07579585.pdf?arnumber=7579585","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,12]],"date-time":"2022-01-12T11:43:06Z","timestamp":1641987786000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7579585\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2016,11]]},"references-count":23,"journal-issue":{"issue":"11"},"URL":"https:\/\/doi.org\/10.1109\/jssc.2016.2602224","relation":{},"ISSN":["0018-9200","1558-173X"],"issn-type":[{"value":"0018-9200","type":"print"},{"value":"1558-173X","type":"electronic"}],"subject":[],"published":{"date-parts":[[2016,11]]}}}