{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,10,8]],"date-time":"2026-10-08T17:30:27Z","timestamp":1791480627827,"version":"4.3.4"},"reference-count":24,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"5","license":[{"start":{"date-parts":[[2017,5,1]],"date-time":"2017-05-01T00:00:00Z","timestamp":1493596800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2017,5,1]],"date-time":"2017-05-01T00:00:00Z","timestamp":1493596800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2017,5,1]],"date-time":"2017-05-01T00:00:00Z","timestamp":1493596800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE J. Solid-State Circuits"],"published-print":{"date-parts":[[2017,5]]},"DOI":"10.1109\/jssc.2017.2654326","type":"journal-article","created":{"date-parts":[[2017,1,31]],"date-time":"2017-01-31T14:49:50Z","timestamp":1485874190000},"page":"1443-1449","source":"Crossref","is-referenced-by-count":208,"title":["A Subthreshold Voltage Reference With Scalable Output Voltage for Low-Power IoT Systems"],"prefix":"10.1109","volume":"52","author":[{"ORCID":"https:\/\/orcid.org\/0000-0001-5723-9678","authenticated-orcid":false,"given":"Inhee","family":"Lee","sequence":"first","affiliation":[{"name":"Department of Electrical Engineering and Computer Science, University of Michigan, Ann Arbor, MI, USA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Dennis","family":"Sylvester","sequence":"additional","affiliation":[{"name":"Department of Electrical Engineering and Computer Science, University of Michigan, Ann Arbor, MI, USA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"David","family":"Blaauw","sequence":"additional","affiliation":[{"name":"Department of Electrical Engineering and Computer Science, University of Michigan, Ann Arbor, MI, USA"}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2014.2350354"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2014.2345298"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2015.2415292"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/CICC.2009.5280773"},{"key":"ref14","first-page":"42","article-title":"0.55 V operation CMOS voltage reference based on the work function difference of poly Si gates","author":"watanabe","year":"2010","journal-title":"Proc Int Meeting Future Electron Devices"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/ESSCIRC.2010.5619816"},{"key":"ref16","article-title":"Reference voltage generator and voltage regulator incorporating same","author":"aota","year":"2010"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2012.2206683"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/VLSIC.2014.6858363"},{"key":"ref19","first-page":"150","article-title":"A highly manufacturable $0.25~\\mu $ m multiple-Vt dual gate oxide CMOS process for logic\/embedded IC foundry technology","author":"chang","year":"1998","journal-title":"IEEE Symp VLSI Technol Dig"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2011.2165235"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2015.7062942"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2012.2191192"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2013.2252523"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/CICC.2014.6946046"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2007.905236"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2015.7062945"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/VLSIC.2012.6243859"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2010.2092997"},{"key":"ref20","first-page":"563","article-title":"A $0.13~\\mu $ m CMOS technology with 193 nm lithography and Cu\/low-k for high performance applications","author":"young","year":"2000","journal-title":"Proc IEEE Int Electron Devices Meeting"},{"key":"ref22","first-page":"1","author":"stephenson","year":"2006","journal-title":"Electronics Power Electronics Optoelectronics Microwaves Electromagnetics and Radar"},{"key":"ref21","doi-asserted-by":"crossref","first-page":"148","DOI":"10.1017\/CBO9781139195065.007","author":"taur","year":"2009","journal-title":"Fundamentals of Modern VLSI Devices"},{"key":"ref24","first-page":"511","article-title":"Effects of packaging and process spread on a mobility-based frequency reference in 0.16- $\\mu $ m CMOS","author":"sebastiano","year":"2011","journal-title":"Proc Eur Solid-State Circuits Conf"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.1989.572629"}],"container-title":["IEEE Journal of Solid-State Circuits"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/4\/7907348\/07837687.pdf?arnumber=7837687","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,7,22]],"date-time":"2025-07-22T18:05:30Z","timestamp":1753207530000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/7837687\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2017,5]]},"references-count":24,"journal-issue":{"issue":"5"},"URL":"https:\/\/doi.org\/10.1109\/jssc.2017.2654326","relation":{},"ISSN":["0018-9200","1558-173X"],"issn-type":[{"value":"0018-9200","type":"print"},{"value":"1558-173X","type":"electronic"}],"subject":[],"published":{"date-parts":[[2017,5]]}}}