{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,3]],"date-time":"2026-03-03T23:38:45Z","timestamp":1772581125573,"version":"3.50.1"},"reference-count":24,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"5","license":[{"start":{"date-parts":[[2017,5,1]],"date-time":"2017-05-01T00:00:00Z","timestamp":1493596800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2017,5,1]],"date-time":"2017-05-01T00:00:00Z","timestamp":1493596800000},"content-version":"am","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2017,5,1]],"date-time":"2017-05-01T00:00:00Z","timestamp":1493596800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2017,5,1]],"date-time":"2017-05-01T00:00:00Z","timestamp":1493596800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/100000001","name":"National Science Foundation","doi-asserted-by":"publisher","award":["1254459"],"award-info":[{"award-number":["1254459"]}],"id":[{"id":"10.13039\/100000001","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/100000001","name":"National Science Foundation","doi-asserted-by":"publisher","award":["1509767"],"award-info":[{"award-number":["1509767"]}],"id":[{"id":"10.13039\/100000001","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/100000001","name":"National Science Foundation","doi-asserted-by":"publisher","award":["1527320"],"award-info":[{"award-number":["1527320"]}],"id":[{"id":"10.13039\/100000001","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE J. Solid-State Circuits"],"published-print":{"date-parts":[[2017,5]]},"DOI":"10.1109\/jssc.2017.2656138","type":"journal-article","created":{"date-parts":[[2017,2,16]],"date-time":"2017-02-16T19:13:28Z","timestamp":1487272408000},"page":"1388-1398","source":"Crossref","is-referenced-by-count":74,"title":["A 0.7-V 0.6- $\\mu \\text{W}$ 100-kS\/s Low-Power SAR ADC With Statistical Estimation-Based Noise Reduction"],"prefix":"10.1109","volume":"52","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-5664-3967","authenticated-orcid":false,"given":"Long","family":"Chen","sequence":"first","affiliation":[]},{"given":"Xiyuan","family":"Tang","sequence":"additional","affiliation":[]},{"given":"Arindam","family":"Sanyal","sequence":"additional","affiliation":[]},{"given":"Yeonam","family":"Yoon","sequence":"additional","affiliation":[]},{"given":"Jie","family":"Cong","sequence":"additional","affiliation":[]},{"given":"Nan","family":"Sun","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","author":"casella","year":"1990","journal-title":"Statistical Inference"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2010.2050225"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2008.2010109"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2015.2422781"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.1984.1052231"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/19.997828"},{"key":"ref16","first-page":"272","article-title":"A 71 dB-SNR 50MS\/s 4.2 mW CMOS SAR ADC by SNR enhancement techniques utilizing noise","author":"morie","year":"2013","journal-title":"IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2006.884231"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/CICC.2013.6658431"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2014.6757480"},{"key":"ref4","first-page":"194","article-title":"An oversampled 12\/14b SAR ADC with noise reduction and linearity enhancements achieving up to 79.1dB SNDR","author":"harpe","year":"2014","journal-title":"IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers"},{"key":"ref3","first-page":"196","article-title":"A 0.85fJ\/conversion-step 10b 200kS\/s subranging SAR ADC in 40nm CMOS","author":"tai","year":"2014","journal-title":"IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers"},{"key":"ref6","first-page":"238","article-title":"An 820 $\\mu$ W 9b 40MS\/s noise-tolerant dynamic-SAR ADC in 90nm digital CMOS","author":"giannini","year":"2008","journal-title":"IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2008.917991"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/CICC.2013.6658425"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2013.2278471"},{"key":"ref2","first-page":"118","article-title":"A 160 $\\mu$ W biopotential acquisition ASIC with fully integrated IA and motion-artifact suppression","author":"van helleputte","year":"2012","journal-title":"IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2007.897157"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/CICC.2015.7338493"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2013.2254551"},{"key":"ref22","doi-asserted-by":"crossref","first-page":"294","DOI":"10.1109\/TCSII.2014.2304890","article-title":"An energy-efficient low frequency-dependence switching technique for SAR ADCs","volume":"61","author":"sanyal","year":"2014","journal-title":"IEEE Trans Circuits Syst II Express Briefs"},{"key":"ref21","first-page":"219","article-title":"A 24- $\\mu $ W 11-bit 1-MS\/s SAR ADC with a bidirectional single-side switching technique","author":"chen","year":"2014","journal-title":"Proc IEEE ESSCIRC"},{"key":"ref24","author":"murmann","year":"0","journal-title":"ADC Performance Survey 1997&#x2013;2013"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2010.2042254"}],"container-title":["IEEE Journal of Solid-State Circuits"],"original-title":[],"link":[{"URL":"http:\/\/ieeexplore.ieee.org\/ielaam\/4\/7907348\/7857744-aam.pdf","content-type":"application\/pdf","content-version":"am","intended-application":"syndication"},{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/4\/7907348\/07857744.pdf?arnumber=7857744","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,4,8]],"date-time":"2022-04-08T18:55:50Z","timestamp":1649444150000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7857744\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2017,5]]},"references-count":24,"journal-issue":{"issue":"5"},"URL":"https:\/\/doi.org\/10.1109\/jssc.2017.2656138","relation":{},"ISSN":["0018-9200","1558-173X"],"issn-type":[{"value":"0018-9200","type":"print"},{"value":"1558-173X","type":"electronic"}],"subject":[],"published":{"date-parts":[[2017,5]]}}}