{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,28]],"date-time":"2026-03-28T16:45:13Z","timestamp":1774716313542,"version":"3.50.1"},"reference-count":34,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"6","license":[{"start":{"date-parts":[[2017,6,1]],"date-time":"2017-06-01T00:00:00Z","timestamp":1496275200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"funder":[{"DOI":"10.13039\/100006754","name":"U.S. Army Research Laboratory and Basic Science Research Program through the National Research Foundation of Korea (NRF)","doi-asserted-by":"publisher","id":[{"id":"10.13039\/100006754","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/501100003725","name":"Ministry of Science, ICT & Future Planning","doi-asserted-by":"publisher","award":["NRF-2016R1C1B2016072"],"award-info":[{"award-number":["NRF-2016R1C1B2016072"]}],"id":[{"id":"10.13039\/501100003725","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE J. Solid-State Circuits"],"published-print":{"date-parts":[[2017,6]]},"DOI":"10.1109\/jssc.2017.2661838","type":"journal-article","created":{"date-parts":[[2017,2,20]],"date-time":"2017-02-20T19:09:03Z","timestamp":1487617743000},"page":"1628-1642","source":"Crossref","is-referenced-by-count":47,"title":["A 23-mW Face Recognition Processor with Mostly-Read 5T Memory in 40-nm CMOS"],"prefix":"10.1109","volume":"52","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-0395-8076","authenticated-orcid":false,"given":"Dongsuk","family":"Jeon","sequence":"first","affiliation":[]},{"given":"Qing","family":"Dong","sequence":"additional","affiliation":[]},{"given":"Yejoong","family":"Kim","sequence":"additional","affiliation":[]},{"given":"Xiaolong","family":"Wang","sequence":"additional","affiliation":[]},{"given":"Shuai","family":"Chen","sequence":"additional","affiliation":[]},{"given":"Hao","family":"Yu","sequence":"additional","affiliation":[]},{"given":"David","family":"Blaauw","sequence":"additional","affiliation":[]},{"given":"Dennis","family":"Sylvester","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2012.2213513"},{"key":"ref32","first-page":"709","article-title":"Asymmetric sizing in a 45nm 5T SRAM to improve read stability over 6T","author":"nalam","year":"2008","journal-title":"Proc IEEE Custom Integr Circuits Conf (CICC)"},{"key":"ref31","first-page":"388","article-title":"A 32 kb 10T sub-threshold SRAM array with bit-interleaving and differential read scheme in 90 nm CMOS","author":"chang","year":"2008","journal-title":"IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2006.1696325"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2016.7417950"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/SiPS.2014.6986056"},{"key":"ref11","first-page":"1","article-title":"Face detection and tracking in color images using color centroids segmentation","author":"fu","year":"2010","journal-title":"Proc Int Conf Biomed Eng Comput Sci"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/CVPR.2001.990517"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.3745\/JIPS.2009.5.2.041"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/CVPR.1991.139758"},{"key":"ref15","first-page":"100","article-title":"A 1.83\n$\\mu{\\rm J}$\n\/classification nonlinear support-vector-machine-based patient-specific seizure classification SoC","author":"altaf","year":"2013","journal-title":"IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1162\/089976600300015042"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2009.4977351"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1198\/016214504000000098"},{"key":"ref19","first-page":"1","article-title":"Learning to align from scratch","author":"huang","year":"2012","journal-title":"Proc Adv Neural Inf Process Syst"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2007.908005"},{"key":"ref4","first-page":"1","article-title":"A 1.9TOPS and 564GOPS\/W heterogeneous multicore SoC with color-based object classification accelerator for image-recognition applications","author":"toru","year":"2015","journal-title":"IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2008.2001872"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2012.2185349"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2014.2386892"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2007.917509"},{"key":"ref5","first-page":"1","article-title":"Imagenet classification with deep convolutional neural networks","author":"krizhevsky","year":"2012","journal-title":"Proc Adv Neural Inf Process Syst"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2016.7418008"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2016.7418007"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/TIP.2015.2507400"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/ICIP.2015.7351375"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/ICRA.2015.7139363"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2011.5937503"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2008.917506"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2009.2020201"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2011.2109434"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/VLSIC.2006.1705286"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2013.2273835"},{"key":"ref25","first-page":"1","article-title":"Low \n${\\rm V}_{\\mathrm{ MIN}}$\n 20 nm embedded SRAM with multi-voltage wordline control based read and write assist techniques","author":"bhargava","year":"2014","journal-title":"Proc Symp VLSI Circuits Dig Tech Papers"}],"container-title":["IEEE Journal of Solid-State Circuits"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/4\/7933283\/07859309.pdf?arnumber=7859309","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,12]],"date-time":"2022-01-12T16:15:19Z","timestamp":1642004119000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7859309\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2017,6]]},"references-count":34,"journal-issue":{"issue":"6"},"URL":"https:\/\/doi.org\/10.1109\/jssc.2017.2661838","relation":{},"ISSN":["0018-9200","1558-173X"],"issn-type":[{"value":"0018-9200","type":"print"},{"value":"1558-173X","type":"electronic"}],"subject":[],"published":{"date-parts":[[2017,6]]}}}