{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,9,29]],"date-time":"2025-09-29T12:08:18Z","timestamp":1759147698063,"version":"3.37.3"},"reference-count":33,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"7","license":[{"start":{"date-parts":[[2017,7,1]],"date-time":"2017-07-01T00:00:00Z","timestamp":1498867200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE J. Solid-State Circuits"],"published-print":{"date-parts":[[2017,7]]},"DOI":"10.1109\/jssc.2017.2695574","type":"journal-article","created":{"date-parts":[[2017,5,25]],"date-time":"2017-05-25T18:13:38Z","timestamp":1495736018000},"page":"1927-1939","source":"Crossref","is-referenced-by-count":8,"title":["A 0.065-mm<sup>2<\/sup> 19.8-mW Single-Channel Calibration-Free 12-b 600-MS\/s ADC in 28-nm UTBB FD-SOI Using FBB"],"prefix":"10.1109","volume":"52","author":[{"ORCID":"https:\/\/orcid.org\/0000-0001-9428-3598","authenticated-orcid":false,"given":"Ashish","family":"Kumar","sequence":"first","affiliation":[]},{"given":"Chandrajit","family":"Debnath","sequence":"additional","affiliation":[]},{"given":"Pratap Narayan","family":"Singh","sequence":"additional","affiliation":[]},{"given":"Vivek","family":"Bhatia","sequence":"additional","affiliation":[]},{"given":"Shivani","family":"Chaudhary","sequence":"additional","affiliation":[]},{"given":"Vigyan","family":"Jain","sequence":"additional","affiliation":[]},{"given":"Stephane","family":"Le Tual","sequence":"additional","affiliation":[]},{"given":"Rakesh","family":"Malik","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"journal-title":"ADC Performance Survey 1997&#x2013;2013","year":"2016","author":"murmann","key":"ref33"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2015.7063126"},{"key":"ref31","first-page":"3b.1.1","article-title":"28 nm node bulk vs FDSOI reliability comparison","author":"federspiel","year":"2012","journal-title":"Proc IEEE Int Rel Phys Symp (IRPS)"},{"key":"ref30","first-page":"314","article-title":"A double-tail latch-type voltage sense amplifier with 18ps setup+hold time","author":"schinkel","year":"2007","journal-title":"IEEE ISSCC Dig Tech Papers"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2016.2591553"},{"key":"ref11","first-page":"165","article-title":"A 0.065 mm2 19.8mW single channel calibration-free 12 b 600 MS\/s ADC in 28 nm UTBB FDSOI using FBB","author":"kumar","year":"2016","journal-title":"Proc Eur Solid-State Circuits Conf (ESSCIRC)"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2013.2295977"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/VLSIT.2012.6242497"},{"key":"ref14","first-page":"424","article-title":"Ultra-wide body-bias range LDPC decoder in 28nm UTBB FDSOI technology","author":"flatresse","year":"2013","journal-title":"IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers"},{"key":"ref15","first-page":"252","article-title":"Technology scaling behavior of optimum reverse body bias for standby leakage power reduction in CMOS IC&#x2019;s","author":"keshavarzi","year":"1999","journal-title":"Proc Int Symp Low Power Electron Design"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2002.803949"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2005.1464510"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2005.850895"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2009.5090884"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2012.6177090"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/55.2058"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2015.2467183"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2010.2048498"},{"key":"ref6","first-page":"98c","article-title":"A 12-bit, 200-MS\/s, 11.5-mW pipeline ADC using a pulsed bucket brigade front-end","author":"dolev","year":"2013","journal-title":"Proc Symp VLSI Circuits"},{"key":"ref5","first-page":"204","article-title":"A 21 mW 15 b 48 MS\/s zero-crossing pipeline ADC in 0.13\n$\\mu $\nm CMOS with 74 dB SNDR","author":"chang","year":"2014","journal-title":"IEEE ISSCC Dig Tech Papers"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM.1994.383439"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/VLSIC.2014.6858451"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2014.2361774"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2014.2300199"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.1980.1051512"},{"key":"ref9","first-page":"468","article-title":"A 5 GS\/s 150 mW 10 b SHA-less pipelined\/SAR hybrid ADC in 28 nm CMOS","author":"brandolini","year":"2015","journal-title":"IEEE ISSCC Dig Tech Papers"},{"article-title":"Differential successive approximation analog to digital converter","year":"2010","author":"le tual","key":"ref20"},{"journal-title":"CMOS Data Converters for Communications","year":"2002","author":"gustavsson","key":"ref22"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.1987.1052843"},{"key":"ref24","first-page":"31","author":"rabaey","year":"2009","journal-title":"Low Power Design Essentials"},{"key":"ref23","first-page":"1","article-title":"An 11.5-ENOB 100-MS\/s 8mW dual-reference SAR ADC in 28nm CMOS","author":"inerfield","year":"2014","journal-title":"Symp VLSI Circuits Dig Tech Papers"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1049\/el.2010.0706"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/4.910473"}],"container-title":["IEEE Journal of Solid-State Circuits"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/4\/7956372\/07934054.pdf?arnumber=7934054","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,12]],"date-time":"2022-01-12T16:59:49Z","timestamp":1642006789000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7934054\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2017,7]]},"references-count":33,"journal-issue":{"issue":"7"},"URL":"https:\/\/doi.org\/10.1109\/jssc.2017.2695574","relation":{},"ISSN":["0018-9200","1558-173X"],"issn-type":[{"type":"print","value":"0018-9200"},{"type":"electronic","value":"1558-173X"}],"subject":[],"published":{"date-parts":[[2017,7]]}}}