{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,2,20]],"date-time":"2026-02-20T18:36:48Z","timestamp":1771612608006,"version":"3.50.1"},"reference-count":24,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"9","license":[{"start":{"date-parts":[[2017,9,1]],"date-time":"2017-09-01T00:00:00Z","timestamp":1504224000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"funder":[{"name":"Research Grant Council of Hong Kong SAR Government, China","award":["616813"],"award-info":[{"award-number":["616813"]}]},{"DOI":"10.13039\/100005144","name":"Qualcomm Technologies, Inc.","doi-asserted-by":"publisher","award":["QUALCOMM14EG02"],"award-info":[{"award-number":["QUALCOMM14EG02"]}],"id":[{"id":"10.13039\/100005144","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE J. Solid-State Circuits"],"published-print":{"date-parts":[[2017,9]]},"DOI":"10.1109\/jssc.2017.2709311","type":"journal-article","created":{"date-parts":[[2017,6,14]],"date-time":"2017-06-14T18:11:29Z","timestamp":1497463889000},"page":"2463-2474","source":"Crossref","is-referenced-by-count":71,"title":["A Nanosecond-Transient Fine-Grained Digital LDO With Multi-Step Switching Scheme and Asynchronous Adaptive Pipeline Control"],"prefix":"10.1109","volume":"52","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-8753-2741","authenticated-orcid":false,"given":"Fan","family":"Yang","sequence":"first","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0001-9858-8604","authenticated-orcid":false,"given":"Philip K. T.","family":"Mok","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/ASSCC.2011.6123569"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2014.2333755"},{"key":"ref12","first-page":"98","article-title":"A \n$0.13~\\mu $\nm fully digital low-dropout regulator with adaptive control and reduced dynamic stability for ultra-wide dynamic range","author":"nasir","year":"2015","journal-title":"IEEE Int Solid-State Circuit Conf Dig Tech Papers"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2016.2530094"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2016.2614308"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/APCCAS.2016.7803890"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2016.7417950"},{"key":"ref17","first-page":"180","article-title":"A 0.6–1 V input capacitor-less asynchronous digital LDO with fast transient response achieving 9.5b over 500 mA loading range in 65-nm CMOS","author":"yang","year":"2015","journal-title":"Proc Eur Solid-State Circuits Conf"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/CICC.2015.7338389"},{"key":"ref19","first-page":"1","article-title":"Clocked comparator for high-speed applications in 65 nm technology","author":"abbas","year":"2010","journal-title":"Proc IEEE Asian Solid-State Circuit Conf"},{"key":"ref4","first-page":"1","article-title":"0.5-V input digital LDO with 98.7% current efficiency and 2.7-\n$\\mu $\nA quiescent current in 65 nm CMOS","author":"okuma","year":"2010","journal-title":"Proc IEEE Custom Integr Circuits Conf"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2006.885060"},{"key":"ref6","first-page":"154","article-title":"Enabling wide autonomous DVFS in a 22 nm graphics execution core using a digitally controlled hybrid LDO\/switched-capacitor VR with fast droop mitigation","author":"kim","year":"2015","journal-title":"IEEE Int Solid-State Circuit Conf Dig Tech Papers"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2014.2353798"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2012.2185354"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2014.6865637"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2010.2053859"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2004.842831"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2013.2237991"},{"key":"ref20","author":"khalil","year":"2002","journal-title":"Nonlinear Systems"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2016.2534778"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/APEC.2015.7104377"},{"key":"ref24","first-page":"340","article-title":"A 100 nA-to-2 mA successive-approximation digital LDO with PD compensation and sub-LSB duty control achieving a 15.1 ns response time at 0.5 V","author":"salem","year":"2017","journal-title":"IEEE Int Solid-State Circuit Conf Dig Tech Papers"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2016.7527206"}],"container-title":["IEEE Journal of Solid-State Circuits"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/4\/8015205\/07948795.pdf?arnumber=7948795","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,12]],"date-time":"2022-01-12T17:03:34Z","timestamp":1642007014000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7948795\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2017,9]]},"references-count":24,"journal-issue":{"issue":"9"},"URL":"https:\/\/doi.org\/10.1109\/jssc.2017.2709311","relation":{},"ISSN":["0018-9200","1558-173X"],"issn-type":[{"value":"0018-9200","type":"print"},{"value":"1558-173X","type":"electronic"}],"subject":[],"published":{"date-parts":[[2017,9]]}}}