{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,1,19]],"date-time":"2026-01-19T09:08:07Z","timestamp":1768813687350,"version":"3.49.0"},"reference-count":20,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"12","license":[{"start":{"date-parts":[[2017,12,1]],"date-time":"2017-12-01T00:00:00Z","timestamp":1512086400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE J. Solid-State Circuits"],"published-print":{"date-parts":[[2017,12]]},"DOI":"10.1109\/jssc.2017.2742518","type":"journal-article","created":{"date-parts":[[2017,9,26]],"date-time":"2017-09-26T18:20:41Z","timestamp":1506450041000},"page":"3446-3457","source":"Crossref","is-referenced-by-count":66,"title":["A 14-nm 0.14-ps<sub>rms<\/sub>Fractional-N Digital PLL With a 0.2-ps Resolution ADC-Assisted Coarse\/Fine-Conversion Chopping TDC and TDC Nonlinearity Calibration"],"prefix":"10.1109","volume":"52","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-6818-0955","authenticated-orcid":false,"given":"Chih-Wei","family":"Yao","sequence":"first","affiliation":[]},{"given":"Ronghua","family":"Ni","sequence":"additional","affiliation":[]},{"given":"Chung","family":"Lau","sequence":"additional","affiliation":[]},{"given":"Wanghua","family":"Wu","sequence":"additional","affiliation":[]},{"given":"Kunal","family":"Godbole","sequence":"additional","affiliation":[]},{"given":"Yongrong","family":"Zuo","sequence":"additional","affiliation":[]},{"given":"Sangsoo","family":"Ko","sequence":"additional","affiliation":[]},{"given":"Nam-Seog","family":"Kim","sequence":"additional","affiliation":[]},{"given":"Sangwook","family":"Han","sequence":"additional","affiliation":[]},{"given":"Ikkyun","family":"Jo","sequence":"additional","affiliation":[]},{"given":"Joonhee","family":"Lee","sequence":"additional","affiliation":[]},{"given":"Juyoung","family":"Han","sequence":"additional","affiliation":[]},{"given":"Daehyeon","family":"Kwon","sequence":"additional","affiliation":[]},{"given":"Chulho","family":"Kim","sequence":"additional","affiliation":[]},{"given":"Shinwoong","family":"Kim","sequence":"additional","affiliation":[]},{"given":"Sang Won","family":"Son","sequence":"additional","affiliation":[]},{"given":"Thomas Byunghak","family":"Cho","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1002\/0470041951"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2004.836345"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.1981.1051666"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.1987.1052730"},{"key":"ref14","doi-asserted-by":"crossref","first-page":"289","DOI":"10.1109\/4.551926","article-title":"A novel high-speed ring oscillator for multiphase clock generation using negative skewed delay scheme","volume":"32","author":"lee","year":"1997","journal-title":"IEEE J Solid-State Circuits"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2009.2014709"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/4.261994"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2014.2314436"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2010.2077370"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2008.2005716"},{"key":"ref4","first-page":"324","article-title":"A PVT-robust ?39 dBc 1 kHz-to-100 MHz integrated-phase-noise 29 GHz injectionlocked frequency multiplier with a 600 $\\mu$ W frequency-tracking loop using the average of phase deviations for mm-band 5G transceivers","author":"yoo","year":"2017","journal-title":"IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2008.2004869"},{"key":"ref6","first-page":"110","article-title":"A low spur fractional-N digital PLL for 802.11 a\/b\/g\/n\/ac with 0.19 psrms jitter","author":"yao","year":"2011","journal-title":"Symp VLSI Circuits Dig Tech Papers"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2008.2005704"},{"key":"ref8","first-page":"174","article-title":"A 2.7-to-4.3 GHz, 0.16 psrms-jitter, ?246.8 dB-FOM, digital fractional-N sampling PLL in 28 nm CMOS","author":"gao","year":"2016","journal-title":"IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2012.2230543"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/TMTT.2016.2647698"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2009.2032723"},{"key":"ref9","first-page":"422","article-title":"A 14 nm fractional-N digital PLL with 0.4 psrms jitter and ?78 dBc fractional spur for cellular RFICs","author":"yao","year":"2017","journal-title":"IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers"},{"key":"ref20","first-page":"139","article-title":"A 2.2 GHz sub-sampling PLL with 0.16 psrms jitter and ?125 dBc\/Hz in-band phase noise at $700~\\mu $ W loop-components power","author":"gao","year":"2010","journal-title":"Proc IEEE Symp VLSI Circuits"}],"container-title":["IEEE Journal of Solid-State Circuits"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/4\/8118328\/08051262.pdf?arnumber=8051262","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,12]],"date-time":"2022-01-12T16:04:39Z","timestamp":1642003479000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/8051262\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2017,12]]},"references-count":20,"journal-issue":{"issue":"12"},"URL":"https:\/\/doi.org\/10.1109\/jssc.2017.2742518","relation":{},"ISSN":["0018-9200","1558-173X"],"issn-type":[{"value":"0018-9200","type":"print"},{"value":"1558-173X","type":"electronic"}],"subject":[],"published":{"date-parts":[[2017,12]]}}}