{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,27]],"date-time":"2026-03-27T19:55:40Z","timestamp":1774641340982,"version":"3.50.1"},"reference-count":20,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"12","license":[{"start":{"date-parts":[[2017,12,1]],"date-time":"2017-12-01T00:00:00Z","timestamp":1512086400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE J. Solid-State Circuits"],"published-print":{"date-parts":[[2017,12]]},"DOI":"10.1109\/jssc.2017.2744661","type":"journal-article","created":{"date-parts":[[2017,10,25]],"date-time":"2017-10-25T14:05:01Z","timestamp":1508940301000},"page":"3517-3531","source":"Crossref","is-referenced-by-count":60,"title":["A 22.5-to-32-Gb\/s 3.2-pJ\/b Referenceless Baud-Rate Digital CDR With DFE and CTLE in 28-nm CMOS"],"prefix":"10.1109","volume":"52","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-4603-5167","authenticated-orcid":false,"given":"Wahid","family":"Rahman","sequence":"first","affiliation":[]},{"given":"Danny","family":"Yoo","sequence":"additional","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0002-8670-7781","authenticated-orcid":false,"given":"Joshua","family":"Liang","sequence":"additional","affiliation":[]},{"given":"Ali","family":"Sheikholeslami","sequence":"additional","affiliation":[]},{"given":"Hirotaka","family":"Tamura","sequence":"additional","affiliation":[]},{"given":"Takayuki","family":"Shibasaki","sequence":"additional","affiliation":[]},{"given":"Hisakatsu","family":"Yamaguchi","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2013.6487664"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2014.2344008"},{"key":"ref12","first-page":"184","article-title":"A 5.9 pJ\/b 10 Gb\/s serial link with unequalized MM-CDR in 14 nm tri-gate CMOS","author":"dokania","year":"2015","journal-title":"IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers"},{"key":"ref13","first-page":"64","article-title":"A 56 Gb\/s NRZ-electrical 247 mW\/lane serial-link transceiver in 28 nm CMOS","author":"shibasaki","year":"2016","journal-title":"IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers"},{"key":"ref14","first-page":"1","article-title":"An 8 mW frequency detector for 10 Gb\/s half-rate CDR using clock phase selection","author":"jalali","year":"2013","journal-title":"Proc IEEE Custom Integr Circuits Conf (CICC)"},{"key":"ref15","first-page":"150","article-title":"A 4-to-10.5 Gb\/s 2.2 mW\/Gb\/s continuous-rate digital CDR with automatic frequency acquisition in 65 nm CMOS","author":"shu","year":"2014","journal-title":"IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2015.2429714"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2017.7870290"},{"key":"ref18","first-page":"152","article-title":"An 8.2-to-10.3 Gb\/s full-rate linear reference-less CDR without frequency detector in $0.18~\\mu $ m CMOS","author":"huang","year":"2014","journal-title":"IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2013.2259033"},{"key":"ref4","first-page":"350c","article-title":"A 1.2–5 Gb\/s 1.4–2 pJ\/b serial link in 22 nm CMOS with a direct data-sequencing blind oversampling CDR","author":"shekhar","year":"2015","journal-title":"IEEE Symp VLSI Circuits Dig Tech Papers"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2007.908714"},{"key":"ref6","doi-asserted-by":"crossref","first-page":"791","DOI":"10.1109\/TVLSI.2014.2316553","article-title":"A 2.5-Gb\/s DLL-based burst-mode clock and data recovery circuit with $4\\times $ oversampling","volume":"23","author":"lin","year":"2015","journal-title":"IEEE Trans Very Large Scale Integr (VLSI) Syst"},{"key":"ref5","first-page":"353","article-title":"A 3.2 Gb\/s oversampling CDR with improved jitter tolerance","author":"brownlee","year":"2007","journal-title":"Proc IEEE Custom Integr Circuits Conf"},{"key":"ref8","first-page":"366","article-title":"A 78 mW 11.8 Gb\/s serial link transceiver with adaptive RX equalization and baud-rate CDR in 32 nm CMOS","author":"spagna","year":"2010","journal-title":"IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/TCOM.1976.1093326"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2002.806284"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1049\/el:19750415"},{"key":"ref9","first-page":"350","article-title":"Analog-DFE-based 16 Gb\/s SerDes in 40 nm CMOS that operates across 34 dB loss channels at Nyquist with a baud rate CDR and 1.2 Vpp voltage-mode driver","author":"joy","year":"2011","journal-title":"IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers"},{"key":"ref20","first-page":"314","article-title":"A double-tail latch-type voltage sense amplifier with 18 ps setup+hold time","author":"schinkel","year":"2007","journal-title":"IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers"}],"container-title":["IEEE Journal of Solid-State Circuits"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/4\/8118328\/08068949.pdf?arnumber=8068949","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,12]],"date-time":"2022-01-12T16:04:39Z","timestamp":1642003479000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/8068949\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2017,12]]},"references-count":20,"journal-issue":{"issue":"12"},"URL":"https:\/\/doi.org\/10.1109\/jssc.2017.2744661","relation":{},"ISSN":["0018-9200","1558-173X"],"issn-type":[{"value":"0018-9200","type":"print"},{"value":"1558-173X","type":"electronic"}],"subject":[],"published":{"date-parts":[[2017,12]]}}}