{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,6,27]],"date-time":"2026-06-27T19:49:13Z","timestamp":1782589753759,"version":"3.54.5"},"reference-count":15,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"1","license":[{"start":{"date-parts":[[2018,1,1]],"date-time":"2018-01-01T00:00:00Z","timestamp":1514764800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE J. Solid-State Circuits"],"published-print":{"date-parts":[[2018,1]]},"DOI":"10.1109\/jssc.2017.2752839","type":"journal-article","created":{"date-parts":[[2017,11,28]],"date-time":"2017-11-28T19:10:06Z","timestamp":1511896206000},"page":"102-114","source":"Crossref","is-referenced-by-count":52,"title":["Zen: An Energy-Efficient High-Performance $\\times $ 86 Core"],"prefix":"10.1109","volume":"53","author":[{"ORCID":"https:\/\/orcid.org\/0000-0001-7996-1370","authenticated-orcid":false,"given":"Teja","family":"Singh","sequence":"first","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Alex","family":"Schaefer","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Sundar","family":"Rangarajan","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Deepesh","family":"John","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Carson","family":"Henrion","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Russell","family":"Schreiber","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Miguel","family":"Rodriguez","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Stephen","family":"Kosonocky","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Samuel","family":"Naffziger","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Amy","family":"Novak","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2005.859879"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2014.2357428"},{"key":"ref12","first-page":"373","article-title":"Asymmetric frequency locked loop (AFLL) for adaptive clock generation in a 28 nm SPARC M6 processor","author":"yanggong","year":"2014","journal-title":"Proc IEEE Asian Solid-State Circuits Conf"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2017.7870452"},{"key":"ref14","article-title":"14 nm process technology: Opening new horizons","author":"bohr","year":"2014","journal-title":"Proc Intel Developer Forum"},{"key":"ref15","author":"gwennap","year":"2015","journal-title":"Skylake Speedshifts to Next Gear"},{"key":"ref4","first-page":"6","article-title":"A new X86 core architecture for the next generation of computing","volume":"28","author":"clark","year":"2016","journal-title":"Hot Chips"},{"key":"ref3","first-page":"52","article-title":"Jaguar: A next-generation low-power $\\times$ 86-64 core","author":"singh","year":"2013","journal-title":"IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers"},{"key":"ref6","first-page":"74","article-title":"Increasing the performance of a 28 nm $\\times$ 86-64 microprocessor through system power management","author":"grenat","year":"2016","journal-title":"IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM.2005.1609253"},{"key":"ref8","first-page":"106","article-title":"An $\\times$ 86-64 core implemented in 32 nm SOI CMOS","author":"jotwani","year":"2010","journal-title":"IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2016.2628772"},{"key":"ref2","doi-asserted-by":"crossref","first-page":"105","DOI":"10.1109\/JSSC.2015.2464688","article-title":"Carrizo: A high performance, energy efficient 28 nm APU","volume":"51","author":"munger","year":"2016","journal-title":"IEEE J Solid-State Circuits"},{"key":"ref1","first-page":"52","article-title":"Zen: A next-generation high-performance $\\times$ 86 core","author":"singh","year":"2017","journal-title":"IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers"},{"key":"ref9","first-page":"98","article-title":"Distributed system of digitally controlled microregulators enabling per-core DVFS for the POWER8 microprocessor","author":"toprak-deniz","year":"2014","journal-title":"IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers"}],"container-title":["IEEE Journal of Solid-State Circuits"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/4\/8241022\/08123510.pdf?arnumber=8123510","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,12]],"date-time":"2022-01-12T16:25:18Z","timestamp":1642004718000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/8123510\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2018,1]]},"references-count":15,"journal-issue":{"issue":"1"},"URL":"https:\/\/doi.org\/10.1109\/jssc.2017.2752839","relation":{},"ISSN":["0018-9200","1558-173X"],"issn-type":[{"value":"0018-9200","type":"print"},{"value":"1558-173X","type":"electronic"}],"subject":[],"published":{"date-parts":[[2018,1]]}}}