{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,2,8]],"date-time":"2026-02-08T17:53:29Z","timestamp":1770573209486,"version":"3.49.0"},"reference-count":13,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"1","license":[{"start":{"date-parts":[[2018,1,1]],"date-time":"2018-01-01T00:00:00Z","timestamp":1514764800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"funder":[{"DOI":"10.13039\/100000185","name":"Defense Advanced Research Projects Agency (DARPA)","doi-asserted-by":"publisher","id":[{"id":"10.13039\/100000185","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE J. Solid-State Circuits"],"published-print":{"date-parts":[[2018,1]]},"DOI":"10.1109\/jssc.2017.2759117","type":"journal-article","created":{"date-parts":[[2017,10,25]],"date-time":"2017-10-25T19:37:50Z","timestamp":1508960270000},"page":"8-19","source":"Crossref","is-referenced-by-count":45,"title":["A Digitally Controlled Fully Integrated Voltage Regulator With On-Die Solenoid Inductor With Planar Magnetic Core in 14-nm Tri-Gate CMOS"],"prefix":"10.1109","volume":"53","author":[{"ORCID":"https:\/\/orcid.org\/0000-0001-5927-8339","authenticated-orcid":false,"given":"Harish K.","family":"Krishnamurthy","sequence":"first","affiliation":[]},{"given":"Vaibhav","family":"Vaidya","sequence":"additional","affiliation":[]},{"given":"Pavan","family":"Kumar","sequence":"additional","affiliation":[]},{"given":"Rinkle","family":"Jain","sequence":"additional","affiliation":[]},{"given":"Sheldon","family":"Weng","sequence":"additional","affiliation":[]},{"given":"Stephen T.","family":"Kim","sequence":"additional","affiliation":[]},{"given":"George E.","family":"Matthew","sequence":"additional","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0002-6795-6440","authenticated-orcid":false,"given":"Nachiket","family":"Desai","sequence":"additional","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0003-2767-215X","authenticated-orcid":false,"given":"Xiaosen","family":"Liu","sequence":"additional","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0003-2271-4314","authenticated-orcid":false,"given":"Krishnan","family":"Ravichandran","sequence":"additional","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0003-0317-4332","authenticated-orcid":false,"given":"James W.","family":"Tschanz","sequence":"additional","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0001-5207-1079","authenticated-orcid":false,"given":"Vivek","family":"De","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","author":"basso","year":"2008","journal-title":"Switch-Mode Power Supplies SPICE Simulations and Practical Designs"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/COMPEL.2006.305666"},{"key":"ref12","first-page":"1","article-title":"Analysis and comparison of three implementation methodologies for high-resolution DPWM","author":"gao","year":"2009","journal-title":"Proc Int Conf Power Electron Syst Appl"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/TPEL.2008.927609"},{"key":"ref4","first-page":"1","article-title":"A 500 MHz, 68% efficient, fully on-die digitally controlled buck voltage regulator on 22 nm tri-gate CMOS","author":"krishnamurthy","year":"2014","journal-title":"Proc VLSIC"},{"key":"ref3","first-page":"432","article-title":"FIVR—Fully integrated voltage regulators on 4th generation Intel Core SoCs","author":"burton","year":"2014","journal-title":"Proc APEC"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/TPEL.2002.807121"},{"key":"ref5","first-page":"35.3.1","article-title":"High-Q magnetic inductors for high efficiency on-chip power conversion","author":"wang","year":"2017","journal-title":"IEDM Tech Dig"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/81.660763"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/5.542410"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2012.2221237"},{"key":"ref1","first-page":"98","article-title":"Distributed system of digitally controlled microregulators enabling per-core DVFS for the POWER8 microprocessor","author":"toprak-deniz","year":"2014","journal-title":"IEEE ISSCC Dig Tech Papers"},{"key":"ref9","year":"2009","journal-title":"Optimizing Low-Power DC\/DC DesignsExternal Versus Internal Compensation"}],"container-title":["IEEE Journal of Solid-State Circuits"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/4\/8241022\/08082494.pdf?arnumber=8082494","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,12]],"date-time":"2022-01-12T16:25:18Z","timestamp":1642004718000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/8082494\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2018,1]]},"references-count":13,"journal-issue":{"issue":"1"},"URL":"https:\/\/doi.org\/10.1109\/jssc.2017.2759117","relation":{},"ISSN":["0018-9200","1558-173X"],"issn-type":[{"value":"0018-9200","type":"print"},{"value":"1558-173X","type":"electronic"}],"subject":[],"published":{"date-parts":[[2018,1]]}}}