{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,6,13]],"date-time":"2026-06-13T16:24:26Z","timestamp":1781367866154,"version":"3.54.1"},"reference-count":40,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"4","license":[{"start":{"date-parts":[[2018,4,1]],"date-time":"2018-04-01T00:00:00Z","timestamp":1522540800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE J. Solid-State Circuits"],"published-print":{"date-parts":[[2018,4]]},"DOI":"10.1109\/jssc.2017.2784761","type":"journal-article","created":{"date-parts":[[2018,1,5]],"date-time":"2018-01-05T19:51:31Z","timestamp":1515181891000},"page":"1149-1160","source":"Crossref","is-referenced-by-count":126,"title":["A 16-bit 16-MS\/s SAR ADC With On-Chip Calibration in 55-nm CMOS"],"prefix":"10.1109","volume":"53","author":[{"ORCID":"https:\/\/orcid.org\/0000-0003-2287-609X","authenticated-orcid":false,"given":"Junhua","family":"Shen","sequence":"first","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Akira","family":"Shikata","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Lalinda D.","family":"Fernando","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-2730-5459","authenticated-orcid":false,"given":"Ned","family":"Guthrie","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-3023-6474","authenticated-orcid":false,"given":"Baozhen","family":"Chen","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-5780-2050","authenticated-orcid":false,"given":"Mark","family":"Maddox","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Nikhil","family":"Mascarenhas","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-9776-6501","authenticated-orcid":false,"given":"Ron","family":"Kapusta","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-3460-2590","authenticated-orcid":false,"given":"Michael C. W.","family":"Coln","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref39","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2017.2656138"},{"key":"ref38","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2015.2422781"},{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1109\/VLSIC.2014.6858451"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2011.2163556"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2011.2123590"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.1990.110180"},{"key":"ref37","article-title":"Accuracy enhancement techniques for ADCs","author":"shen","year":"2015"},{"key":"ref36","first-page":"62","article-title":"A 12b 70 MS\/s SAR ADC with digital startup calibration in 14nm CMOS","author":"lee","year":"2015","journal-title":"IEEE Symp VLSI Circuits Dig Tech Papers"},{"key":"ref35","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2016.2609849"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.1984.1052231"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2011.2108133"},{"key":"ref40","author":"murmann","year":"2017","journal-title":"ADC Performance Survey 1997–2013"},{"key":"ref11","first-page":"1","article-title":"High linearity PVT tolerant 100 MS\/s rail-to-rail ADC driver with built-in sampler in 65nm CMOS","author":"palani","year":"2014","journal-title":"Proc IEEE Custom Integr Circuits Conf (CICC)"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2015.2463110"},{"key":"ref13","first-page":"282","article-title":"A 16-bit 16 MS\/s SAR ADC with on-chip calibration in 55 nm CMOS","author":"shen","year":"2017","journal-title":"IEEE Symp VLSI Circuits Dig Tech Papers"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2006.884231"},{"key":"ref15","first-page":"246","article-title":"A 65fJ\/conversion-step 0-to-50MS\/s 0-to-0.7 mW 9b charge-sharing SAR ADC in 90 nm digital CMOS","author":"craninckx","year":"2007","journal-title":"IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2011.2143870"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2013.2274113"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/VLSIC.2010.5560246"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2014.2362851"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2014.6757396"},{"key":"ref4","first-page":"280","article-title":"An 18-bit 2MS\/s pipelined SAR ADC utilizing a sampling distortion cancellation circuit with ?107 dB THD at 100 kHz","author":"hummerston","year":"2017","journal-title":"IEEE Symp VLSI Circuits Dig Tech Papers"},{"key":"ref27","first-page":"1","article-title":"A 3.3fJ\/conversion-step 250 kS\/s 10b SAR ADC using optimized vote allocation","author":"ahmadi","year":"2013","journal-title":"Proc IEEE Custom Integr Circuits Conf (CICC)"},{"key":"ref3","first-page":"153","article-title":"A 16 bit linear passive-charge-sharing SAR ADC in 55 nm CMOS","author":"maddox","year":"2016","journal-title":"IEEE Asian Solid-State Circuits Conf (A-SSCC) Dig Tech Papers"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2007.897157"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2015.2417803"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2007.892169"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2012.2185352"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2008.917427"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/VLSIC.2014.6858371"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2013.2278471"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2010.2075310"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/19.293411"},{"key":"ref22","first-page":"176","article-title":"A 1.2V 10b 20MSample\/s non-binary successive approximation ADC in 0.13 \n$\\mu$\nm CMOS","author":"kuttner","year":"2002","journal-title":"IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2006.884330"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2012.6177096"},{"key":"ref23","first-page":"386","article-title":"A 10b 100 MS\/s 1.13 mW SAR ADC with binary-scaled error compensation","author":"liu","year":"2010","journal-title":"IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2008.917991"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2016.2563780"}],"container-title":["IEEE Journal of Solid-State Circuits"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/4\/8325040\/08248649.pdf?arnumber=8248649","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,12]],"date-time":"2022-01-12T16:23:12Z","timestamp":1642004592000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/8248649\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2018,4]]},"references-count":40,"journal-issue":{"issue":"4"},"URL":"https:\/\/doi.org\/10.1109\/jssc.2017.2784761","relation":{},"ISSN":["0018-9200","1558-173X"],"issn-type":[{"value":"0018-9200","type":"print"},{"value":"1558-173X","type":"electronic"}],"subject":[],"published":{"date-parts":[[2018,4]]}}}