{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,2,11]],"date-time":"2026-02-11T13:03:03Z","timestamp":1770814983414,"version":"3.50.1"},"reference-count":27,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"3","license":[{"start":{"date-parts":[[2018,3,1]],"date-time":"2018-03-01T00:00:00Z","timestamp":1519862400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2018,3,1]],"date-time":"2018-03-01T00:00:00Z","timestamp":1519862400000},"content-version":"am","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2018,3,1]],"date-time":"2018-03-01T00:00:00Z","timestamp":1519862400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2018,3,1]],"date-time":"2018-03-01T00:00:00Z","timestamp":1519862400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/100000001","name":"NSF","doi-asserted-by":"publisher","award":["CCF-1453142"],"award-info":[{"award-number":["CCF-1453142"]}],"id":[{"id":"10.13039\/100000001","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/100008873","name":"Catalyst Foundation","doi-asserted-by":"publisher","id":[{"id":"10.13039\/100008873","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE J. Solid-State Circuits"],"published-print":{"date-parts":[[2018,3]]},"DOI":"10.1109\/jssc.2018.2791460","type":"journal-article","created":{"date-parts":[[2018,1,31]],"date-time":"2018-01-31T19:33:24Z","timestamp":1517427204000},"page":"728-737","source":"Crossref","is-referenced-by-count":33,"title":["An Area-Efficient Microprocessor-Based SoC With an Instruction-Cache Transformable to an Ambient Temperature Sensor and a Physically Unclonable Function"],"prefix":"10.1109","volume":"53","author":[{"ORCID":"https:\/\/orcid.org\/0000-0001-5859-5877","authenticated-orcid":false,"given":"Jiangyi","family":"Li","sequence":"first","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0002-9277-143X","authenticated-orcid":false,"given":"Teng","family":"Yang","sequence":"additional","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0003-1141-4818","authenticated-orcid":false,"given":"Minhao","family":"Yang","sequence":"additional","affiliation":[]},{"given":"Peter R.","family":"Kinget","sequence":"additional","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0002-9722-0979","authenticated-orcid":false,"given":"Mingoo","family":"Seok","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"crossref","first-page":"763","DOI":"10.1109\/JSSC.2015.2506641","article-title":"Static physically unclonable functions for secure chip identification with 1.9–5.8% native bit instability at 0.6–1 V and 15 fJ\/bit in 65 nm","volume":"51","author":"alvarez","year":"2016","journal-title":"IEEE J Solid-State Circuits"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2014.6757433"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2017.8050630"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2007.910961"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/ESSCIRC.2012.6341361"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/ESSCIRC.2016.7598332"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2012.2233352"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2012.2206683"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2017.7870303"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-642-32946-3_27"},{"key":"ref4","first-page":"222","article-title":"A 80kS\/s $36~\\mu $ W resistor-based temperature sensor using BGR-free SAR ADC with a unevenly-weighted resistor string in $0.18~\\mu $ m CMOS","author":"wu","year":"2011","journal-title":"Proc Symp VLSI Circuits (VLSIC)"},{"key":"ref27","first-page":"82c","article-title":"A CMOS temperature sensor with a 49fJK2 resolution FoM","author":"pan","year":"2017","journal-title":"Proc Symp VLSI Circuits (VLSIC)"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2016.2586498"},{"key":"ref6","first-page":"222","article-title":"12.7 A 0.85 V 600 nW all-CMOS temperature sensor with an inaccuracy of ±0.4 °C (3 $\\sigma$ ) from ?40 to 125 °C","author":"souri","year":"2014","journal-title":"IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2014.2325574"},{"key":"ref8","first-page":"200c","article-title":"A self-referenced VCO-based temperature sensor with 0.034 °C\/mV supply sensitivity in 65 nm CMOS","author":"anand","year":"2015","journal-title":"Proc Symp VLSI Circuits (VLSI Circuits)"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2013.2246254"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2015.2476815"},{"key":"ref9","first-page":"1","article-title":"A 0.7 V resistive sensor with temperature\/voltage detection function in 16 nm FinFET technologies","author":"horng","year":"2014","journal-title":"Symp VLSI Circuits Dig Tech Papers"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1016\/j.comnet.2010.05.010"},{"key":"ref20","first-page":"58","article-title":"Design and implementation of PUF-based ‘unclonable’ RFID ICs for anti-counterfeiting and security applications","author":"devadas","year":"2008","journal-title":"Proc IEEE Int Conf RFID (RFID)"},{"key":"ref22","first-page":"188","article-title":"The Phoenix processor: A 30pW platform for sensor applications","author":"seok","year":"2008","journal-title":"Proc IEEE Symp VLSI Circuits (VLSI)"},{"key":"ref21","first-page":"158","article-title":"Physically unclonable function for secure key generation with a key error rate of 2E-38 in 45 nm smart-card chips","author":"karpinskyy","year":"2016","journal-title":"IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers"},{"key":"ref24","year":"2013","journal-title":"16-bit Educational MIPS"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2010.5433921"},{"key":"ref26","first-page":"270c","article-title":"A sequence dependent challenge-response PUF using 28 nm SRAM 6 T bit cell","author":"jeloka","year":"2017","journal-title":"Proc Symp VLSI Circuits (VLSIC)"},{"key":"ref25","first-page":"10","article-title":"Computing’s energy problem (and what we can do about it)","author":"horowitz","year":"2014","journal-title":"IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers"}],"container-title":["IEEE Journal of Solid-State Circuits"],"original-title":[],"link":[{"URL":"http:\/\/ieeexplore.ieee.org\/ielaam\/4\/8295182\/8277159-aam.pdf","content-type":"application\/pdf","content-version":"am","intended-application":"syndication"},{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/4\/8295182\/08277159.pdf?arnumber=8277159","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,4,8]],"date-time":"2022-04-08T18:55:49Z","timestamp":1649444149000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/8277159\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2018,3]]},"references-count":27,"journal-issue":{"issue":"3"},"URL":"https:\/\/doi.org\/10.1109\/jssc.2018.2791460","relation":{},"ISSN":["0018-9200","1558-173X"],"issn-type":[{"value":"0018-9200","type":"print"},{"value":"1558-173X","type":"electronic"}],"subject":[],"published":{"date-parts":[[2018,3]]}}}