{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,1,31]],"date-time":"2026-01-31T11:13:41Z","timestamp":1769858021361,"version":"3.49.0"},"reference-count":27,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"7","license":[{"start":{"date-parts":[[2018,7,1]],"date-time":"2018-07-01T00:00:00Z","timestamp":1530403200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"funder":[{"name":"IWT\u2013Flemish Fund for Innovation by Science and Technology"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE J. Solid-State Circuits"],"published-print":{"date-parts":[[2018,7]]},"DOI":"10.1109\/jssc.2018.2821121","type":"journal-article","created":{"date-parts":[[2018,4,19]],"date-time":"2018-04-19T18:10:04Z","timestamp":1524161404000},"page":"2101-2113","source":"Crossref","is-referenced-by-count":36,"title":["Margin Elimination Through Timing Error Detection in a Near-Threshold Enabled 32-bit Microcontroller in 40-nm CMOS"],"prefix":"10.1109","volume":"53","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-5368-3533","authenticated-orcid":false,"given":"Hans","family":"Reyserhove","sequence":"first","affiliation":[]},{"given":"Wim","family":"Dehaene","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2010.2089657"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2013.2284364"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2017.2749423"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD.1998.727074"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD.1993.393383"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2006.870912"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2010.2079410"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2012.2220912"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2015.2418713"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2016.2625598"},{"key":"ref4","first-page":"155","article-title":"Design margin elimination in a near-threshold timing error masking-aware 32-bit ARM Cortex M0 in 40 nm CMOS","author":"reyserhove","year":"2017","journal-title":"Proc IEEE European Solid-State Circuits Conf (ESSCIRC)"},{"key":"ref27","first-page":"438","article-title":"Power supply noise in a 22 nm z13™ microprocessor","author":"chuang","year":"2017","journal-title":"Proc IEEE Int Solid-State Circuits Conf (ISSCC)"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2004.837945"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2007.4397342"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.1996.488543"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2008.2007148"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2008.2007145"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2014.2369503"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2010.5457058"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2017.2693241"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/VTEST.1999.766651"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2014.2328658"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/ASSCC.2013.6690999"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2014.2366918"},{"key":"ref23","first-page":"1","article-title":"A 3.15 pJ\/cyc 32-bit RISC CPU with timing-error prevention and adaptive clocking in 28 nm CMOS","author":"hiienkari","year":"2014","journal-title":"Proc IEEE Custom Integr Circuits Conf (CICC)"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/VLSIC.2012.6243806"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/VLSIC.2016.7573561"}],"container-title":["IEEE Journal of Solid-State Circuits"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/4\/8396884\/08341856.pdf?arnumber=8341856","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,12]],"date-time":"2022-01-12T16:23:25Z","timestamp":1642004605000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/8341856\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2018,7]]},"references-count":27,"journal-issue":{"issue":"7"},"URL":"https:\/\/doi.org\/10.1109\/jssc.2018.2821121","relation":{},"ISSN":["0018-9200","1558-173X"],"issn-type":[{"value":"0018-9200","type":"print"},{"value":"1558-173X","type":"electronic"}],"subject":[],"published":{"date-parts":[[2018,7]]}}}