{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,2,27]],"date-time":"2026-02-27T15:17:45Z","timestamp":1772205465446,"version":"3.50.1"},"reference-count":22,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"10","license":[{"start":{"date-parts":[[2018,10,1]],"date-time":"2018-10-01T00:00:00Z","timestamp":1538352000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"funder":[{"DOI":"10.13039\/501100003052","name":"Ministry of Trade, Industry and Energy","doi-asserted-by":"publisher","id":[{"id":"10.13039\/501100003052","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/100004358","name":"Samsung","doi-asserted-by":"publisher","id":[{"id":"10.13039\/100004358","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE J. Solid-State Circuits"],"published-print":{"date-parts":[[2018,10]]},"DOI":"10.1109\/jssc.2018.2856243","type":"journal-article","created":{"date-parts":[[2018,8,6]],"date-time":"2018-08-06T22:24:44Z","timestamp":1533594284000},"page":"2994-3003","source":"Crossref","is-referenced-by-count":24,"title":["A 0.75\u20133.0-Gb\/s Dual-Mode Temperature-Tolerant Referenceless CDR With a Deadzone-Compensated Frequency Detector"],"prefix":"10.1109","volume":"53","author":[{"ORCID":"https:\/\/orcid.org\/0000-0001-7012-9991","authenticated-orcid":false,"given":"Jahoon","family":"Jin","sequence":"first","affiliation":[]},{"given":"Xuefan","family":"Jin","sequence":"additional","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0003-3690-4901","authenticated-orcid":false,"given":"Jaehong","family":"Jung","sequence":"additional","affiliation":[]},{"given":"Kiwon","family":"Kwon","sequence":"additional","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0001-9418-5787","authenticated-orcid":false,"given":"Jintae","family":"Kim","sequence":"additional","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0002-2668-6739","authenticated-orcid":false,"given":"Jung-Hoon","family":"Chun","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2011.2168872"},{"key":"ref11","first-page":"184","article-title":"A 650Mb\/s-to-8Gb\/s referenceless CDR circuit with automatic acquisition of data rate","author":"lee","year":"2009","journal-title":"IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers"},{"key":"ref12","doi-asserted-by":"crossref","first-page":"428","DOI":"10.1109\/JSSC.2015.2497963","article-title":"A 4-to-10.5 Gb\/s continuous-rate digital clock and data recovery with automatic frequency acquisition","volume":"51","author":"shu","year":"2016","journal-title":"IEEE J Solid-State Circuits"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2015.2429714"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2015.2427332"},{"key":"ref15","doi-asserted-by":"crossref","first-page":"399","DOI":"10.1109\/TCSII.2007.914896","article-title":"A wide-band CMOS \n$LC$\n VCO with linearized coarse tuning characteristics","volume":"55","author":"kim","year":"2008","journal-title":"IEEE Trans Circuits Syst II Exp Briefs"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2017.2695612"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2014.2350294"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/4.918913"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/4.5947"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2005.856577"},{"key":"ref3","first-page":"214","article-title":"A 2.75 Gb\/s CMOS clock recovery circuit with broad capture range","author":"anand","year":"2001","journal-title":"IEEE Int Conf Solid-State Circuits Conf (ISSCC) Dig Tech Papers"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2004.831809"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2009.2031042"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2013.2259033"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2016.2584106"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/4.173101"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/TCOM.1985.1096264"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2015.2512713"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1049\/el:20092727"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2002.806266"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2009.2021922"}],"container-title":["IEEE Journal of Solid-State Circuits"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/4\/8470270\/08425749.pdf?arnumber=8425749","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,26]],"date-time":"2022-01-26T11:36:16Z","timestamp":1643196976000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/8425749\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2018,10]]},"references-count":22,"journal-issue":{"issue":"10"},"URL":"https:\/\/doi.org\/10.1109\/jssc.2018.2856243","relation":{},"ISSN":["0018-9200","1558-173X"],"issn-type":[{"value":"0018-9200","type":"print"},{"value":"1558-173X","type":"electronic"}],"subject":[],"published":{"date-parts":[[2018,10]]}}}