{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,2,19]],"date-time":"2026-02-19T08:04:07Z","timestamp":1771488247843,"version":"3.50.1"},"reference-count":21,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"1","license":[{"start":{"date-parts":[[2019,1,1]],"date-time":"2019-01-01T00:00:00Z","timestamp":1546300800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2019,1,1]],"date-time":"2019-01-01T00:00:00Z","timestamp":1546300800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2019,1,1]],"date-time":"2019-01-01T00:00:00Z","timestamp":1546300800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"name":"Macao Science and Technology Development Fund through SKL Fund"},{"DOI":"10.13039\/501100004733","name":"University of Macau","doi-asserted-by":"crossref","award":["MYRG2017-00185-AMSV"],"award-info":[{"award-number":["MYRG2017-00185-AMSV"]}],"id":[{"id":"10.13039\/501100004733","id-type":"DOI","asserted-by":"crossref"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE J. Solid-State Circuits"],"published-print":{"date-parts":[[2019,1]]},"DOI":"10.1109\/jssc.2018.2870551","type":"journal-article","created":{"date-parts":[[2018,10,1]],"date-time":"2018-10-01T18:40:01Z","timestamp":1538419201000},"page":"88-98","source":"Crossref","is-referenced-by-count":30,"title":["A 0.0056-mm<sup>2<\/sup> \u2212249-dB-FoM All-Digital MDLL Using a Block-Sharing Offset-Free Frequency-Tracking Loop and Dual Multiplexed-Ring VCOs"],"prefix":"10.1109","volume":"54","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-4883-160X","authenticated-orcid":false,"given":"Shiheng","family":"Yang","sequence":"first","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0002-4195-4551","authenticated-orcid":false,"given":"Jun","family":"Yin","sequence":"additional","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0002-3579-8740","authenticated-orcid":false,"given":"Pui-In","family":"Mak","sequence":"additional","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0003-2821-648X","authenticated-orcid":false,"given":"Rui P.","family":"Martins","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2013.2254552"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2015.2473667"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2016.2638432"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2008.917372"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2017.2734910"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2018.8310212"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/4.766813"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2002.804339"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2008.925948"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2009.2032470"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2013.2284651"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2012.2227609"},{"key":"ref6","first-page":"152","article-title":"A 2.5-to-5.75GHz 5mW 0.3psrms-jitter cascaded ring-based digital injection-locked clock multiplier in 65nm CMOS","author":"coombs","year":"2017","journal-title":"IEEE ISSCC Dig Tech Papers"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2016.2574804"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2008.2006225"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2017.7870305"},{"key":"ref2","first-page":"336","article-title":"An all-digital clock generator using a fractionally injection-locked oscillator in 65nm CMOS","author":"park","year":"2012","journal-title":"IEEE ISSCC Dig Tech Papers"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2008.2012363"},{"key":"ref9","first-page":"466","article-title":"A 4.6 GHz MDLL with ?46dBc reference spur and aperture position tuning","author":"ali","year":"2013","journal-title":"IEEE ISSCC Dig Tech Papers"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2016.2598768"},{"key":"ref21","doi-asserted-by":"crossref","first-page":"626","DOI":"10.1109\/JSSC.2015.2511157","article-title":"A 2.4 GHz 4 mW integer-N inductorless RF synthesizer","volume":"51","author":"kong","year":"2016","journal-title":"IEEE J Solid-State Circuits"}],"container-title":["IEEE Journal of Solid-State Circuits"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/4\/8613098\/08478158.pdf?arnumber=8478158","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,7,13]],"date-time":"2022-07-13T20:58:40Z","timestamp":1657745920000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/8478158\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2019,1]]},"references-count":21,"journal-issue":{"issue":"1"},"URL":"https:\/\/doi.org\/10.1109\/jssc.2018.2870551","relation":{},"ISSN":["0018-9200","1558-173X"],"issn-type":[{"value":"0018-9200","type":"print"},{"value":"1558-173X","type":"electronic"}],"subject":[],"published":{"date-parts":[[2019,1]]}}}