{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,4,25]],"date-time":"2026-04-25T14:38:35Z","timestamp":1777127915278,"version":"3.51.4"},"reference-count":29,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"1","license":[{"start":{"date-parts":[[2019,1,1]],"date-time":"2019-01-01T00:00:00Z","timestamp":1546300800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2019,1,1]],"date-time":"2019-01-01T00:00:00Z","timestamp":1546300800000},"content-version":"am","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2019,1,1]],"date-time":"2019-01-01T00:00:00Z","timestamp":1546300800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2019,1,1]],"date-time":"2019-01-01T00:00:00Z","timestamp":1546300800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/100004351","name":"Cisco Systems","doi-asserted-by":"publisher","id":[{"id":"10.13039\/100004351","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/100000001","name":"National Science Foundation","doi-asserted-by":"publisher","award":["CCF-1255937"],"award-info":[{"award-number":["CCF-1255937"]}],"id":[{"id":"10.13039\/100000001","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE J. Solid-State Circuits"],"published-print":{"date-parts":[[2019,1]]},"DOI":"10.1109\/jssc.2018.2870558","type":"journal-article","created":{"date-parts":[[2018,10,1]],"date-time":"2018-10-01T18:40:01Z","timestamp":1538419201000},"page":"109-120","source":"Crossref","is-referenced-by-count":79,"title":["A Fully Integrated Digital LDO With Built-In Adaptive Sampling and Active Voltage Positioning Using a Beat-Frequency Quantizer"],"prefix":"10.1109","volume":"54","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-5891-7968","authenticated-orcid":false,"given":"Somnath","family":"Kundu","sequence":"first","affiliation":[]},{"given":"Muqing","family":"Liu","sequence":"additional","affiliation":[]},{"given":"Shi-Jie","family":"Wen","sequence":"additional","affiliation":[]},{"given":"Richard","family":"Wong","sequence":"additional","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0002-4194-1347","authenticated-orcid":false,"given":"Chris H.","family":"Kim","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2018.8310310"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2016.2530094"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2018.8310307"},{"key":"ref13","first-page":"346","article-title":"A 0.5V-VIN 1.44mA-class event-driven digital LDO with a fully integrated 100pF output capacitor","author":"kim","year":"2017","journal-title":"IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2014.2353798"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2008.917500"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2017.8050960"},{"key":"ref17","first-page":"1","article-title":"A fully-digital beat-frequency based ADC achieving 39dB SNDR for a 1.6mVpp input signal","author":"kim","year":"2013","journal-title":"Proc IEEE Custom Integr Circuits Conf"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/CICC.2014.6946126"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/CICC.2015.7338382"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/APEC.2014.6803348"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/TPEL.2016.2519446"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/TPEL.2010.2095508"},{"key":"ref3","first-page":"1","article-title":"0.5-V input digital LDO with 98.7% current efficiency and 2.7-\n$\\mu\\text{A}$\n quiescent current in 65nm CMOS","author":"okuma","year":"2010","journal-title":"Proc IEEE Custom Integr Circuits Conf"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2017.2766215"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2012.2185354"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2016.2614308"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2017.2709311"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2017.2740269"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2014.2380644"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2017.7870399"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2015.7062972"},{"key":"ref20","first-page":"140c","article-title":"A 0.4–1.6GHz spur-free bang-bang digital PLL in 65nm with a D-flip-flop based frequency subtractor circuit","author":"kim","year":"2015","journal-title":"Proc IEEE Symp VLSI Circuits (VLSI)"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2010.2040125"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2008.917502"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/CICC.2014.6946136"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2011.2160813"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/TPEL.2015.2405339"},{"key":"ref25","author":"sheehan","year":"1999","journal-title":"Active Voltage Positioning Reduces Output Capacitors Linear Technology"}],"container-title":["IEEE Journal of Solid-State Circuits"],"original-title":[],"link":[{"URL":"https:\/\/ieeexplore.ieee.org\/ielaam\/4\/8613098\/8478195-aam.pdf","content-type":"application\/pdf","content-version":"am","intended-application":"syndication"},{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/4\/8613098\/08478195.pdf?arnumber=8478195","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,7,13]],"date-time":"2022-07-13T20:58:40Z","timestamp":1657745920000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/8478195\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2019,1]]},"references-count":29,"journal-issue":{"issue":"1"},"URL":"https:\/\/doi.org\/10.1109\/jssc.2018.2870558","relation":{},"ISSN":["0018-9200","1558-173X"],"issn-type":[{"value":"0018-9200","type":"print"},{"value":"1558-173X","type":"electronic"}],"subject":[],"published":{"date-parts":[[2019,1]]}}}