{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,2,26]],"date-time":"2026-02-26T15:27:45Z","timestamp":1772119665827,"version":"3.50.1"},"reference-count":33,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"12","license":[{"start":{"date-parts":[[2018,12,1]],"date-time":"2018-12-01T00:00:00Z","timestamp":1543622400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE J. Solid-State Circuits"],"published-print":{"date-parts":[[2018,12]]},"DOI":"10.1109\/jssc.2018.2871632","type":"journal-article","created":{"date-parts":[[2018,10,12]],"date-time":"2018-10-12T14:54:47Z","timestamp":1539356087000},"page":"3660-3671","source":"Crossref","is-referenced-by-count":29,"title":["All-Digital PLL for Bluetooth Low Energy Using 32.768-kHz Reference Clock and \u22640.45-V Supply"],"prefix":"10.1109","volume":"53","author":[{"given":"Chao-Chieh","family":"Li","sequence":"first","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0003-4902-1358","authenticated-orcid":false,"given":"Min-Shueh","family":"Yuan","sequence":"additional","affiliation":[]},{"given":"Chia-Chun","family":"Liao","sequence":"additional","affiliation":[]},{"given":"Yu-Tso","family":"Lin","sequence":"additional","affiliation":[]},{"given":"Chih-Hsien","family":"Chang","sequence":"additional","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0001-9848-1129","authenticated-orcid":false,"given":"Robert Bogdan","family":"Staszewski","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref33","author":"ruffieux","year":"2018","journal-title":"private communication"},{"key":"ref32","year":"2018","journal-title":"Microcrystal CMV7V"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1109\/DCAS.2010.5955030"},{"key":"ref30","author":"pelgrom","year":"2016","journal-title":"Analog-to-Digital Conversion"},{"key":"ref10","first-page":"246","article-title":"A 0.98 mW fractional-N ADPLL using 10b isolated constant-slope DTC with FOM of ?246 dB for IoT applications in 65nm CMOS","author":"liu","year":"2018","journal-title":"IEEE ISSCC Dig Tech Papers"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/TMTT.2015.2406693"},{"key":"ref12","first-page":"90","article-title":"A \n$95\\mu\\text{W}$\n 24 MHz digitally controlled crystal oscillator for IoT applications with 36 nJ start-up energy and \n$> 13\\times$\n start-up time reduction using a fully-autonomous dynamically-adjusted load","author":"ding","year":"2017","journal-title":"Proc IEEE Solid-State Circuits Conf"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2011.2162769"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2005.858750"},{"key":"ref15","first-page":"176","article-title":"A self-calibrated 10 Mb\/s phase modulator with ?37.4 dB EVM based on a 10.1-to-12.4 GHz, ?246.6 db-FOM, fractional-N subsampling PLL","author":"markulic","year":"2016","journal-title":"Proc IEEE Solid-State Circuits Conf"},{"key":"ref16","year":"2014","journal-title":"BlueTooth Specification Version 4 2"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2013.2273823"},{"key":"ref18","first-page":"1","article-title":"A 0.034 mm2, 725 fs RMS jitter, 1.8%\/V frequency-pushing, 10.8&#x2013;19.3 GHz transformer-based fractional-N all-digital PLL in 10 nm FinFET CMOS","author":"li","year":"2016","journal-title":"Proc IEEE Symp VLSI Circuits"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1002\/0470041951"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2014.2361351"},{"key":"ref4","first-page":"172","article-title":"An \n$860\\mu\\text{W}$\n 2.1-to-2.7 GHz all-digital PLL-based frequency modulator with a DTC-assisted snapshot TDC for WPAN (Bluetooth Smart and ZigBee) applications","author":"chillara","year":"2014","journal-title":"IEEE ISSCC Dig Tech Papers"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2017.2766208"},{"key":"ref3","first-page":"342","article-title":"A 0.27 mm2 13.5 dBm 2.4 GHz all-digital polar transmitter using 34%-efficiency Class-D DPA in 40nm CMOS","author":"lai","year":"2013","journal-title":"Proc IEEE Solid-State Circuits Conf"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2017.2654322"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2015.2470553"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2016.2551738"},{"key":"ref8","first-page":"178c","article-title":"A 0.5 V 1.6 mW 2.4 GHz fractional-N all-digital PLL for Bluetooth LE with PVT-insensitive TDC using switched-capacitor doubler in 28nm CMOS","author":"kuo","year":"2017","journal-title":"Proc IEEE Symp VLSI Circuits"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2016.2625462"},{"key":"ref2","first-page":"448","article-title":"A 2.7 nJ\/b multi-standard 2.3\/2.4 GHz polar transmitter for wireless sensor networks","author":"liu","year":"2012","journal-title":"Proc IEEE Solid-State Circuits Conf"},{"key":"ref9","first-page":"420","article-title":"A \n$673\\mu\\text{W}$\n 1.8-to-2.5 GHz dividerless fractional-N digital PLL with an inherent frequency-capture capability and a phase-dithering spur mitigation for IoT applications","author":"he","year":"2017","journal-title":"Proc IEEE Solid-State Circuits Conf"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2004.836345"},{"key":"ref20","first-page":"1","article-title":"A 1.22 ps integrated-jitter 0.25-to-4 GHz fractional-N ADPLL in 16 nm FinFET CM0S","author":"tsai","year":"2015","journal-title":"Proc IEEE Solid-State Circuits Conf"},{"key":"ref22","first-page":"448","article-title":"A 0.45 V sub-mW all-digital PLL in 16 nm FinFET for Bluetooth low-energy (BLE) modulation and instantaneous channel hopping using 32.768 kHz reference","author":"yuan","year":"2018","journal-title":"Proc IEEE Solid-State Circuits Conf"},{"key":"ref21","first-page":"332","article-title":"A 0.2 V trifilar-coil DCO with DC-DC converter in 16 nm FinFET CMOS with 188 dB FOM, 1.3 kHz resolution, and frequency pushing of 38 MHz\/V for energy harvesting applications","author":"li","year":"2017","journal-title":"Proc IEEE Solid-State Circuits Conf"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2010.2077370"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2011.2162917"},{"key":"ref26","first-page":"52","article-title":"A regulation-free sub-0.5 V 16\/24 MHz crystal oscillator for energy-harvesting BLE radios with 14.2 nJ startup energy and 31.8 \n$\\mu\\text{W}$\n steady-state power","author":"lei","year":"2018","journal-title":"Proc IEEE Solid-State Circuits Conf"},{"key":"ref25","first-page":"104","article-title":"A 24 MHz crystal oscillator with robust fast start-up using dithered injection","author":"griffith","year":"2016","journal-title":"Proc IEEE Solid-State Circuits Conf"}],"container-title":["IEEE Journal of Solid-State Circuits"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/4\/8580626\/08490904.pdf?arnumber=8490904","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,12]],"date-time":"2022-01-12T11:34:44Z","timestamp":1641987284000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/8490904\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2018,12]]},"references-count":33,"journal-issue":{"issue":"12"},"URL":"https:\/\/doi.org\/10.1109\/jssc.2018.2871632","relation":{},"ISSN":["0018-9200","1558-173X"],"issn-type":[{"value":"0018-9200","type":"print"},{"value":"1558-173X","type":"electronic"}],"subject":[],"published":{"date-parts":[[2018,12]]}}}